diff options
| author | Jayachandran C <jchandra@broadcom.com> | 2012-10-31 13:01:35 +0100 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2012-11-09 11:37:19 +0100 |
| commit | feddaf7d89d554b705e7eb14a9202c4946e57c8e (patch) | |
| tree | 8f0ac095229b404f7503f5b916f922a1fe21be3c /arch/mips/netlogic | |
| parent | MIPS: Netlogic: Fix interrupt table entry init (diff) | |
| download | linux-feddaf7d89d554b705e7eb14a9202c4946e57c8e.tar.xz linux-feddaf7d89d554b705e7eb14a9202c4946e57c8e.zip | |
MIPS: Netlogic: Pass cpuid to early_init_secondary
The cpuid was not passed into early_init_secondary even though the
comment indicated that it will be. Fix this.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4458
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/netlogic')
| -rw-r--r-- | arch/mips/netlogic/common/smp.c | 2 | ||||
| -rw-r--r-- | arch/mips/netlogic/common/smpboot.S | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c index fab316de57e9..cd39f5429e8a 100644 --- a/arch/mips/netlogic/common/smp.c +++ b/arch/mips/netlogic/common/smp.c @@ -98,7 +98,7 @@ void nlm_early_init_secondary(int cpu) change_c0_config(CONF_CM_CMASK, 0x3); write_c0_ebase((uint32_t)nlm_common_ebase); #ifdef CONFIG_CPU_XLP - if (hard_smp_processor_id() % 4 == 0) + if (cpu % 4 == 0) xlp_mmu_init(); #endif } diff --git a/arch/mips/netlogic/common/smpboot.S b/arch/mips/netlogic/common/smpboot.S index 25c1825873c7..a0b74874bebe 100644 --- a/arch/mips/netlogic/common/smpboot.S +++ b/arch/mips/netlogic/common/smpboot.S @@ -186,7 +186,7 @@ EXPORT(nlm_boot_siblings) * jump to the secondary wait function. */ mfc0 v0, CP0_EBASE, 1 - andi v0, 0x7f /* v0 <- node/core */ + andi v0, 0x3ff /* v0 <- node/core */ /* Init MMU in the first thread after changing THREAD_MODE * register (Ax Errata?) @@ -263,6 +263,8 @@ NESTED(nlm_boot_secondary_cpus, 16, sp) PTR_L gp, 0(t1) /* a0 has the processor id */ + mfc0 a0, CP0_EBASE, 1 + andi a0, 0x3ff /* a0 <- node/core */ PTR_LA t0, nlm_early_init_secondary jalr t0 nop |