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authorJayachandran C <jchandra@broadcom.com>2013-08-11 11:13:57 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-09-03 23:22:19 +0200
commitc49e42aba8e8471e30e0ee4d29f9871a4ba67ae9 (patch)
tree1fb595a42304185d1b2183093a4d757adb11e478 /arch/mips/netlogic
parentMIPS: Netlogic: XLP2XX CPU and PIC frequency (diff)
downloadlinux-c49e42aba8e8471e30e0ee4d29f9871a4ba67ae9.tar.xz
linux-c49e42aba8e8471e30e0ee4d29f9871a4ba67ae9.zip
MIPS: Netlogic: Core wakeup changes for XLP2XX
On XLP2xx, wakeup code does not need to enable clock on the core. Update xlp/wakeup.c to handle this. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5703/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/netlogic')
-rw-r--r--arch/mips/netlogic/xlp/wakeup.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c
index 0cce37cbffef..682d5638dc01 100644
--- a/arch/mips/netlogic/xlp/wakeup.c
+++ b/arch/mips/netlogic/xlp/wakeup.c
@@ -58,10 +58,12 @@ static int xlp_wakeup_core(uint64_t sysbase, int node, int core)
coremask = (1 << core);
- /* Enable CPU clock */
- value = nlm_read_sys_reg(sysbase, SYS_CORE_DFS_DIS_CTRL);
- value &= ~coremask;
- nlm_write_sys_reg(sysbase, SYS_CORE_DFS_DIS_CTRL, value);
+ /* Enable CPU clock in case of 8xx/3xx */
+ if (!cpu_is_xlpii()) {
+ value = nlm_read_sys_reg(sysbase, SYS_CORE_DFS_DIS_CTRL);
+ value &= ~coremask;
+ nlm_write_sys_reg(sysbase, SYS_CORE_DFS_DIS_CTRL, value);
+ }
/* Remove CPU Reset */
value = nlm_read_sys_reg(sysbase, SYS_CPU_RESET);