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authorRalf Baechle <ralf@linux-mips.org>2006-10-23 01:44:02 +0200
committerRalf Baechle <ralf@linux-mips.org>2006-11-30 02:14:45 +0100
commit714cfe7865e5182a3b25be6a95c0b17aa8e64aa9 (patch)
treeb6ff754613c17d196b2f1e9fc1db937a370bce9f /arch/mips/oprofile/op_model_mipsxx.c
parent[MIPS] Remove unused R10000 performance counter definitions. (diff)
downloadlinux-714cfe7865e5182a3b25be6a95c0b17aa8e64aa9.tar.xz
linux-714cfe7865e5182a3b25be6a95c0b17aa8e64aa9.zip
[MIPS] Oprofile: kernel support for the R10000.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/oprofile/op_model_mipsxx.c')
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c32
1 files changed, 27 insertions, 5 deletions
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 1fb240c57bac..455d76ad06d8 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -18,7 +18,7 @@
#define M_PERFCTL_SUPERVISOR (1UL << 2)
#define M_PERFCTL_USER (1UL << 3)
#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
-#define M_PERFCTL_EVENT(event) ((event) << 5)
+#define M_PERFCTL_EVENT(event) (((event) & 0x3f) << 5)
#define M_PERFCTL_VPEID(vpe) ((vpe) << 16)
#define M_PERFCTL_MT_EN(filter) ((filter) << 20)
#define M_TC_EN_ALL M_PERFCTL_MT_EN(0)
@@ -218,13 +218,23 @@ static inline int __n_counters(void)
static inline int n_counters(void)
{
- int counters = __n_counters();
+ int counters;
+
+ switch (current_cpu_data.cputype) {
+ case CPU_R10000:
+ counters = 2;
+
+ case CPU_R12000:
+ case CPU_R14000:
+ counters = 4;
+
+ default:
+ counters = __n_counters();
+ }
#ifdef CONFIG_MIPS_MT_SMP
- if (current_cpu_data.cputype == CPU_34K)
- return counters >> 1;
+ counters >> 1;
#endif
-
return counters;
}
@@ -284,6 +294,18 @@ static int __init mipsxx_init(void)
op_model_mipsxx_ops.cpu_type = "mips/5K";
break;
+ case CPU_R10000:
+ if ((current_cpu_data.processor_id & 0xff) == 0x20)
+ op_model_mipsxx_ops.cpu_type = "mips/r10000-v2.x";
+ else
+ op_model_mipsxx_ops.cpu_type = "mips/r10000";
+ break;
+
+ case CPU_R12000:
+ case CPU_R14000:
+ op_model_mipsxx_ops.cpu_type = "mips/r12000";
+ break;
+
case CPU_SB1:
case CPU_SB1A:
op_model_mipsxx_ops.cpu_type = "mips/sb1";