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| author | Wu Zhangjin <wuzhangjin@gmail.com> | 2010-05-06 19:03:49 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-07-05 18:17:31 +0200 |
| commit | 1d84267480ce8cf9943b79b70da86ddb3f95e3dd (patch) | |
| tree | 6032d06980f11251b50cb44adb2846baf34d39f5 /arch/mips/oprofile | |
| parent | MIPS: Alchemy: sleepcode without compile-time cputype dependencies (diff) | |
| download | linux-1d84267480ce8cf9943b79b70da86ddb3f95e3dd.tar.xz linux-1d84267480ce8cf9943b79b70da86ddb3f95e3dd.zip | |
MIPS: Oprofile: Fixup of loongson2_exit()
When exiting from loongson2_exit(), we need to reset the counter
register too, this patch adds a function reset_counters() to do it, by
the way, this function will be shared by Perf.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1199/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/oprofile')
| -rw-r--r-- | arch/mips/oprofile/op_model_loongson2.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index d0d24e047676..60d3ea602118 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -43,6 +43,12 @@ static struct loongson2_register_config { static char *oprofid = "LoongsonPerf"; static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); +static void reset_counters(void *arg) +{ + write_c0_perfctrl(0); + write_c0_perfcnt(0); +} + static void loongson2_reg_setup(struct op_counter_config *cfg) { unsigned int ctrl = 0; @@ -139,7 +145,7 @@ static int __init loongson2_init(void) static void loongson2_exit(void) { - write_c0_perfctrl(0); + reset_counters(NULL); free_irq(LOONGSON2_PERFCNT_IRQ, oprofid); } |