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authorThomas Gleixner <tglx@linutronix.de>2021-12-06 23:27:38 +0100
committerThomas Gleixner <tglx@linutronix.de>2021-12-09 11:52:21 +0100
commitbec61847cdc7ff22d6d85e6e6436d4b7416c1f9b (patch)
tree13617669d0290496c3de119b10ea5467fcad37e5 /arch/mips/pci/msi-octeon.c
parentPCI/sysfs: Use pci_irq_vector() (diff)
downloadlinux-bec61847cdc7ff22d6d85e6e6436d4b7416c1f9b.tar.xz
linux-bec61847cdc7ff22d6d85e6e6436d4b7416c1f9b.zip
MIPS: Octeon: Use arch_setup_msi_irq()
The core code provides the same loop code except for the MSI-X reject. Move that to arch_setup_msi_irq() and remove the duplicated code. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Link: https://lore.kernel.org/r/20211206210224.319201379@linutronix.de
Diffstat (limited to 'arch/mips/pci/msi-octeon.c')
-rw-r--r--arch/mips/pci/msi-octeon.c32
1 files changed, 3 insertions, 29 deletions
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c
index 288b58b00dc8..c2860ebbd863 100644
--- a/arch/mips/pci/msi-octeon.c
+++ b/arch/mips/pci/msi-octeon.c
@@ -68,6 +68,9 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
u64 search_mask;
int index;
+ if (desc->pci.msi_attrib.is_msix)
+ return -EINVAL;
+
/*
* Read the MSI config to figure out how many IRQs this device
* wants. Most devices only want 1, which will give
@@ -182,35 +185,6 @@ msi_irq_allocated:
return 0;
}
-int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
-{
- struct msi_desc *entry;
- int ret;
-
- /*
- * MSI-X is not supported.
- */
- if (type == PCI_CAP_ID_MSIX)
- return -EINVAL;
-
- /*
- * If an architecture wants to support multiple MSI, it needs to
- * override arch_setup_msi_irqs()
- */
- if (type == PCI_CAP_ID_MSI && nvec > 1)
- return 1;
-
- for_each_pci_msi_entry(entry, dev) {
- ret = arch_setup_msi_irq(dev, entry);
- if (ret < 0)
- return ret;
- if (ret > 0)
- return -ENOSPC;
- }
-
- return 0;
-}
-
/**
* Called when a device no longer needs its MSI interrupts. All
* MSI interrupts for the device are freed.