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authorRalf Baechle <ralf@linux-mips.org>2006-10-07 20:44:33 +0200
committerRalf Baechle <ralf@linux-mips.org>2006-10-08 03:38:28 +0200
commit937a801576f954bd030d7c4a5a94571710d87c0b (patch)
tree48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/pci/pci-ip32.c
parent[MIPS] Show actual CPU information in /proc/cpuinfo (diff)
downloadlinux-937a801576f954bd030d7c4a5a94571710d87c0b.tar.xz
linux-937a801576f954bd030d7c4a5a94571710d87c0b.zip
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/pci-ip32.c')
-rw-r--r--arch/mips/pci/pci-ip32.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c
index 17c7932cf0ae..618ea7dbc474 100644
--- a/arch/mips/pci/pci-ip32.c
+++ b/arch/mips/pci/pci-ip32.c
@@ -22,7 +22,7 @@
* registered on the bridge error irq. It's conceivable that some of these
* conditions warrant a panic. Anybody care to say which ones?
*/
-static irqreturn_t macepci_error(int irq, void *dev, struct pt_regs *regs)
+static irqreturn_t macepci_error(int irq, void *dev)
{
char s;
unsigned int flags = mace->pci.error;