diff options
| author | Ben Hutchings <ben@decadent.org.uk> | 2010-06-13 23:22:59 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-07-26 20:08:19 +0200 |
| commit | 8faf2e6c201d95b780cd3b4674b7a55ede6dcbbb (patch) | |
| tree | ccae9e193f41652a4cd1fb9db371298d6ea586e5 /arch/mips/pci | |
| parent | MIPS: Alchemy: Define eth platform devices in the correct order (diff) | |
| download | linux-8faf2e6c201d95b780cd3b4674b7a55ede6dcbbb.tar.xz linux-8faf2e6c201d95b780cd3b4674b7a55ede6dcbbb.zip | |
MIPS: Set io_map_base for several PCI bridges lacking it
Several MIPS platforms don't set pci_controller::io_map_base for their
PCI bridges. This results in a panic in pci_iomap(). (The panic is
conditional on CONFIG_PCI_DOMAINS, but that is now enabled for all PCI
MIPS systems.)
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: linux-mips@linux-mips.org
Cc: Martin Michlmayr <tbm@cyrius.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: 584784@bugs.debian.org
Patchwork: https://patchwork.linux-mips.org/patch/1377/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
| -rw-r--r-- | arch/mips/pci/ops-pmcmsp.c | 1 | ||||
| -rw-r--r-- | arch/mips/pci/pci-yosemite.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c index 04b31478a6d7..b7c03d80c88c 100644 --- a/arch/mips/pci/ops-pmcmsp.c +++ b/arch/mips/pci/ops-pmcmsp.c @@ -944,6 +944,7 @@ static struct pci_controller msp_pci_controller = { .pci_ops = &msp_pci_ops, .mem_resource = &pci_mem_resource, .mem_offset = 0, + .io_map_base = MSP_PCI_IOSPACE_BASE, .io_resource = &pci_io_resource, .io_offset = 0 }; diff --git a/arch/mips/pci/pci-yosemite.c b/arch/mips/pci/pci-yosemite.c index 0357946f30e6..cf5e1a25cb7d 100644 --- a/arch/mips/pci/pci-yosemite.c +++ b/arch/mips/pci/pci-yosemite.c @@ -54,6 +54,7 @@ static int __init pmc_yosemite_setup(void) panic(ioremap_failed); set_io_port_base(io_v_base); + py_controller.io_map_base = io_v_base; TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1); ioport_resource.end = TITAN_IO_SIZE - 1; |