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author | Zhou Yanjie <zhouyanjie@cduestc.edu.cn> | 2019-01-24 19:22:15 +0100 |
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committer | Paul Burton <paul.burton@mips.com> | 2019-01-25 20:19:37 +0100 |
commit | 1ca1c87f91d9dc50d6a38e2177b2032996e7901c (patch) | |
tree | d7b67b5629dc27f225b923f2a4de46d8999c9392 /arch/mips/pci | |
parent | MIPS: DTS: jz4740: Correct interrupt number of DMA core (diff) | |
download | linux-1ca1c87f91d9dc50d6a38e2177b2032996e7901c.tar.xz linux-1ca1c87f91d9dc50d6a38e2177b2032996e7901c.zip |
DTS: CI20: Fix bugs in ci20's device tree.
According to the Schematic, the hardware of ci20 leads to uart3,
but not to uart2. Uart2 is miswritten in the original code.
Signed-off-by: Zhou Yanjie <zhouyanjie@cduestc.edu.cn>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips <linux-mips@vger.kernel.org>
Cc: linux-kernel <linux-kernel@vger.kernel.org>
Cc: devicetree@vger.kernel.org
Cc: robh+dt@kernel.org
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: mark.rutland@arm.com
Cc: malat@debian.org
Cc: ezequiel@collabora.co.uk
Cc: ulf.hansson@linaro.org
Cc: syq <syq@debian.org>
Cc: jiaxun.yang <jiaxun.yang@flygoat.com>
Diffstat (limited to 'arch/mips/pci')
0 files changed, 0 insertions, 0 deletions