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| author | Stefan Hengelein <stefan.hengelein@fau.de> | 2014-10-19 20:04:26 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-10-24 02:37:18 +0200 |
| commit | 6fa88d9e0886ad646ef5706539fc314cbaccd690 (patch) | |
| tree | e43298d43c439e7d855630c9434eed65ce82cda5 /arch/mips/pmcs-msp71xx | |
| parent | MIPS: Malta: Do not build the malta-amon.c file if CMP is not enabled (diff) | |
| download | linux-6fa88d9e0886ad646ef5706539fc314cbaccd690.tar.xz linux-6fa88d9e0886ad646ef5706539fc314cbaccd690.zip | |
MIPS: MSP71xx: Fix build error
When CONFIG_MIPS_MT_SMP is enabled, the following compilation error
occurs:
arch/mips/pmcs-msp71xx/msp_irq_cic.c:134: error: ‘irq’ undeclared
This code clearly never saw a compiler.
The surrounding code suggests, that 'd->irq' was intended, not
'irq'.
This error was found with vampyr.
Signed-off-by: Stefan Hengelein <stefan.hengelein@fau.de>
Fixes: d7881fbdf866d7d0 ("MIPS: msp71xx: Convert to new irq_chip functions")
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8116/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pmcs-msp71xx')
| -rw-r--r-- | arch/mips/pmcs-msp71xx/msp_irq_cic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/pmcs-msp71xx/msp_irq_cic.c b/arch/mips/pmcs-msp71xx/msp_irq_cic.c index b8df2f7b3328..1207ec4dfb77 100644 --- a/arch/mips/pmcs-msp71xx/msp_irq_cic.c +++ b/arch/mips/pmcs-msp71xx/msp_irq_cic.c @@ -131,11 +131,11 @@ static int msp_cic_irq_set_affinity(struct irq_data *d, int cpu; unsigned long flags; unsigned int mtflags; - unsigned long imask = (1 << (irq - MSP_CIC_INTBASE)); + unsigned long imask = (1 << (d->irq - MSP_CIC_INTBASE)); volatile u32 *cic_mask = (volatile u32 *)CIC_VPE0_MSK_REG; /* timer balancing should be disabled in kernel code */ - BUG_ON(irq == MSP_INT_VPE0_TIMER || irq == MSP_INT_VPE1_TIMER); + BUG_ON(d->irq == MSP_INT_VPE0_TIMER || d->irq == MSP_INT_VPE1_TIMER); LOCK_CORE(flags, mtflags); /* enable if any of each VPE's TCs require this IRQ */ |