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authorHuacai Chen <chenhc@lemote.com>2015-03-29 04:54:05 +0200
committerRalf Baechle <ralf@linux-mips.org>2015-04-01 17:22:09 +0200
commit2a21dc7c196209d94cb570a0d340faa6c760f7f8 (patch)
tree4c7cceb66386d80c32321b00ec3cb29912d36b21 /arch/mips/power/Makefile
parentMIPS: SEAD3: Nuke remaining I2C bits. (diff)
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MIPS: Hibernate: flush TLB entries earlier
We found that TLB mismatch not only happens after kernel resume, but also happens during snapshot restore. So move it to the beginning of swsusp_arch_suspend(). Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: <stable@vger.kernel.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9621/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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