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| author | Ingo Molnar <mingo@elte.hu> | 2009-08-23 11:18:47 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-08-23 11:18:47 +0200 |
| commit | 8a517c514d5893602cf85c1b4c47afbbc04d2198 (patch) | |
| tree | e7c40f68ef97bb2bdb4c366c0b45437bc049feb1 /arch/mips/power/hibernate.S | |
| parent | x86, cpu: cpu/proc.c display cache alignment and address sizes for 32 bit (diff) | |
| parent | Linux 2.6.31-rc7 (diff) | |
| download | linux-8a517c514d5893602cf85c1b4c47afbbc04d2198.tar.xz linux-8a517c514d5893602cf85c1b4c47afbbc04d2198.zip | |
Merge commit 'v2.6.31-rc7' into x86/cpu
Diffstat (limited to 'arch/mips/power/hibernate.S')
| -rw-r--r-- | arch/mips/power/hibernate.S | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S new file mode 100644 index 000000000000..4b8174b382d7 --- /dev/null +++ b/arch/mips/power/hibernate.S @@ -0,0 +1,61 @@ +/* + * Hibernation support specific for mips - temporary page tables + * + * Licensed under the GPLv2 + * + * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology + * Author: Hu Hongbing <huhb@lemote.com> + * Wu Zhangjin <wuzj@lemote.com> + */ +#include <asm/asm-offsets.h> +#include <asm/regdef.h> +#include <asm/asm.h> + +.text +LEAF(swsusp_arch_suspend) + PTR_LA t0, saved_regs + PTR_S ra, PT_R31(t0) + PTR_S sp, PT_R29(t0) + PTR_S fp, PT_R30(t0) + PTR_S gp, PT_R28(t0) + PTR_S s0, PT_R16(t0) + PTR_S s1, PT_R17(t0) + PTR_S s2, PT_R18(t0) + PTR_S s3, PT_R19(t0) + PTR_S s4, PT_R20(t0) + PTR_S s5, PT_R21(t0) + PTR_S s6, PT_R22(t0) + PTR_S s7, PT_R23(t0) + j swsusp_save +END(swsusp_arch_suspend) + +LEAF(swsusp_arch_resume) + PTR_L t0, restore_pblist +0: + PTR_L t1, PBE_ADDRESS(t0) /* source */ + PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */ + PTR_ADDIU t3, t1, _PAGE_SIZE +1: + REG_L t8, (t1) + REG_S t8, (t2) + PTR_ADDIU t1, t1, SZREG + PTR_ADDIU t2, t2, SZREG + bne t1, t3, 1b + PTR_L t0, PBE_NEXT(t0) + bnez t0, 0b + PTR_LA t0, saved_regs + PTR_L ra, PT_R31(t0) + PTR_L sp, PT_R29(t0) + PTR_L fp, PT_R30(t0) + PTR_L gp, PT_R28(t0) + PTR_L s0, PT_R16(t0) + PTR_L s1, PT_R17(t0) + PTR_L s2, PT_R18(t0) + PTR_L s3, PT_R19(t0) + PTR_L s4, PT_R20(t0) + PTR_L s5, PT_R21(t0) + PTR_L s6, PT_R22(t0) + PTR_L s7, PT_R23(t0) + PTR_LI v0, 0x0 + jr ra +END(swsusp_arch_resume) |