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authorManuel Lauss <mano@roarinelk.homelinux.net>2007-12-06 08:11:56 +0100
committerRalf Baechle <ralf@linux-mips.org>2007-12-09 05:51:10 +0100
commit0f5e49a2e2de69ee05ad8783274b0672247fd18f (patch)
tree7b29369dbf98b1a0346a4bc9c294cd64a3a05892 /arch/mips/qemu
parent[MIPS] Don't byteswap writes to display when running bigendian (diff)
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[MIPS] Alchemy: Fix Au1x SD controller IRQ
With the introduction of MIPS_CPU_IRQ_BASE, the hardcoded IRQ number of the au1100/au1200 SD controller(s) is no longer valid. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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