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author | Ralf Baechle <ralf@linux-mips.org> | 2009-04-19 03:21:22 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2009-05-14 14:50:26 +0200 |
commit | 47740eb887796608fb4c629aa6b8507a2fb6c0eb (patch) | |
tree | 3b772b4b5f3a09899ec27c131cfdace411c75d74 /arch/mips/rb532/serial.c | |
parent | MIPS: Loongson 2 needs no hazard barriers. (diff) | |
download | linux-47740eb887796608fb4c629aa6b8507a2fb6c0eb.tar.xz linux-47740eb887796608fb4c629aa6b8507a2fb6c0eb.zip |
MIPS: Enable CLO / CLZ instructions via separate CPU property
This is useful for IDT RC32332, RC32334 and NEC VR5500 processors which do
not implement the full MIPS32 / MIPS64 architecture.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/rb532/serial.c')
0 files changed, 0 insertions, 0 deletions