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author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:09 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:09 +0200 |
commit | 7bcf7717b6a047c272410d0cd00213185fe6b99d (patch) | |
tree | 81c5d6bbc2130815713e22bb5408ea80b6e1c499 /arch/mips/sgi-ip22 | |
parent | [MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers. (diff) | |
download | linux-7bcf7717b6a047c272410d0cd00213185fe6b99d.tar.xz linux-7bcf7717b6a047c272410d0cd00213185fe6b99d.zip |
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sgi-ip22')
-rw-r--r-- | arch/mips/sgi-ip22/ip22-int.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index 338c0d706988..f199da7e49cf 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c @@ -242,7 +242,7 @@ asmlinkage void plat_irq_dispatch(void) * First we check for r4k counter/timer IRQ. */ if (pending & CAUSEF_IP7) - ll_timer_interrupt(SGI_TIMER_IRQ, NULL); + do_IRQ(SGI_TIMER_IRQ); else if (pending & CAUSEF_IP2) indy_local0_irqdispatch(); else if (pending & CAUSEF_IP3) |