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authorSuman Anna <s-anna@ti.com>2015-09-18 20:16:30 +0200
committerTony Lindgren <tony@atomide.com>2015-10-13 00:00:37 +0200
commita9c8f117f43515572a914e9ec7332906c4e7cdde (patch)
tree591cc1e134d63179e494f28db8d07f24404c55bf /arch/mips/sgi-ip27/ip27-timer.c
parentARM: dts: am335x-wega: Clean up regulators (diff)
downloadlinux-a9c8f117f43515572a914e9ec7332906c4e7cdde.tar.xz
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ARM: dts: DRA74x: Add IPC sub-mailbox nodes for all IPUs & DSPs
Add the sub-mailbox nodes that are used to communicate between MPU and the remote processors IPU1, IPU2, DSP1 and DSP2. The sub-mailbox nodes utilize the System Mailbox instances 5 and 6. These sub-mailbox nodes are added to match the hard-coded mailbox configuration used within the TI IPC 3.x software package. The Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to be running in SMP-mode, and hence only a single sub-mailbox node is added for each. All these sub-mailbox nodes are left in disabled state, and should be enabled (and modified if needed) as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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