diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2013-01-22 12:59:30 +0100 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-02-01 10:00:22 +0100 |
commit | 7034228792cc561e79ff8600f02884bd4c80e287 (patch) | |
tree | 89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/sibyte/bcm1480/irq.c | |
parent | MIPS: Nuke empty lines at end of files. (diff) | |
download | linux-7034228792cc561e79ff8600f02884bd4c80e287.tar.xz linux-7034228792cc561e79ff8600f02884bd4c80e287.zip |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte/bcm1480/irq.c')
-rw-r--r-- | arch/mips/sibyte/bcm1480/irq.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 215713e1f3c4..09d6e16a70f1 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -283,10 +283,10 @@ void __init arch_init_irq(void) for (cpu = 0; cpu < 4; cpu++) { __raw_writeq(IMR_IP3_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) + (K_BCM1480_INT_MBOX_0_0 << 3))); - } + } - /* Clear the mailboxes. The firmware may leave them dirty */ + /* Clear the mailboxes. The firmware may leave them dirty */ for (cpu = 0; cpu < 4; cpu++) { __raw_writeq(0xffffffffffffffffULL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_MAILBOX_0_CLR_CPU))); @@ -307,7 +307,7 @@ void __init arch_init_irq(void) /* * Note that the timer interrupts are also mapped, but this is - * done in bcm1480_time_init(). Also, the profiling driver + * done in bcm1480_time_init(). Also, the profiling driver * does its own management of IP7. */ @@ -325,7 +325,7 @@ static inline void dispatch_ip2(void) /* * Default...we've hit an IP[2] interrupt, which means we've got to - * check the 1480 interrupt registers to figure out what to do. Need + * check the 1480 interrupt registers to figure out what to do. Need * to detect which CPU we're on, now that smp_affinity is supported. */ base = A_BCM1480_IMR_MAPPER(cpu); |