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author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-04-28 02:46:52 +0200 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-04-28 02:46:52 +0200 |
commit | 91ec4b0d11fe115581ce2835300558802ce55e6c (patch) | |
tree | 0c31e5d1627212dd459901f899c10f036b571d0e /arch/mips/sibyte | |
parent | Merge tag 'sh-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git... (diff) | |
parent | MIPS: uprobes: Restore thread.trap_nr (diff) | |
download | linux-91ec4b0d11fe115581ce2835300558802ce55e6c.tar.xz linux-91ec4b0d11fe115581ce2835300558802ce55e6c.zip |
Merge tag 'mips_6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- added support for Huawei B593u-12
- added support for virt board aligned to QEMU MIPS virt board
- added support for doing DMA coherence on a per device base
- reworked handling of RALINK SoCs
- cleanup for Loongon64 barriers
- removed deprecated support for MIPS_CMP SMP handling method
- removed support Sibyte CARMEL and CHRINE boards
- cleanups and fixes
* tag 'mips_6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (59 commits)
MIPS: uprobes: Restore thread.trap_nr
MIPS: Don't clear _PAGE_SPECIAL in _PAGE_CHG_MASK
MIPS: Sink body of check_bugs_early() into its only call site
MIPS: Mark check_bugs() as __init
Revert "MIPS: generic: Enable all CPUs supported by virt board in Kconfig"
MIPS: octeon_switch: Remove duplicated labels
MIPS: loongson2ef: Add missing break in cs5536_isa
MIPS: Remove set_swbp() in uprobes.c
MIPS: Use def_bool y for ARCH_SUPPORTS_UPROBES
MIPS: fw: Allow firmware to pass a empty env
MIPS: Remove deprecated CONFIG_MIPS_CMP
MIPS: lantiq: remove unused function declaration
MIPS: Drop unused positional parameter in local_irq_{dis,en}able
MIPS: mm: Remove local_cache_flush_page
MIPS: Remove no longer used ide.h
MIPS: mm: Remove unused *cache_page_indexed flush functions
MIPS: generic: Enable all CPUs supported by virt board in Kconfig
MIPS: Add board config for virt board
MIPS: Octeon: Disable CVMSEG by default on other platforms
MIPS: Loongson: Don't select platform features with CPU
...
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r-- | arch/mips/sibyte/Kconfig | 33 | ||||
-rw-r--r-- | arch/mips/sibyte/Makefile | 6 | ||||
-rw-r--r-- | arch/mips/sibyte/Platform | 8 | ||||
-rw-r--r-- | arch/mips/sibyte/common/bus_watcher.c | 4 | ||||
-rw-r--r-- | arch/mips/sibyte/common/cfe.c | 17 | ||||
-rw-r--r-- | arch/mips/sibyte/common/sb_tbprof.c | 10 | ||||
-rw-r--r-- | arch/mips/sibyte/swarm/setup.c | 12 |
7 files changed, 12 insertions, 78 deletions
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig index 470d46183677..5fb92fe84149 100644 --- a/arch/mips/sibyte/Kconfig +++ b/arch/mips/sibyte/Kconfig @@ -10,15 +10,6 @@ config SIBYTE_SB1250 select SIBYTE_SB1xxx_SOC select SYS_SUPPORTS_SMP -config SIBYTE_BCM1120 - bool - select CEVT_SB1250 - select CSRC_SB1250 - select IRQ_MIPS_CPU - select SIBYTE_BCM112X - select SIBYTE_HAS_ZBUS_PROFILING - select SIBYTE_SB1xxx_SOC - config SIBYTE_BCM1125 bool select CEVT_SB1250 @@ -29,17 +20,6 @@ config SIBYTE_BCM1125 select SIBYTE_HAS_ZBUS_PROFILING select SIBYTE_SB1xxx_SOC -config SIBYTE_BCM1125H - bool - select CEVT_SB1250 - select CSRC_SB1250 - select HAVE_PCI - select IRQ_MIPS_CPU - select SIBYTE_BCM112X - select SIBYTE_ENABLE_LDT_IF_PCI - select SIBYTE_HAS_ZBUS_PROFILING - select SIBYTE_SB1xxx_SOC - config SIBYTE_BCM112X bool select CEVT_SB1250 @@ -58,16 +38,6 @@ config SIBYTE_BCM1x80 select SIBYTE_SB1xxx_SOC select SYS_SUPPORTS_SMP -config SIBYTE_BCM1x55 - bool - select CEVT_BCM1480 - select CSRC_BCM1480 - select HAVE_PCI - select IRQ_MIPS_CPU - select SIBYTE_SB1xxx_SOC - select SIBYTE_HAS_ZBUS_PROFILING - select SYS_SUPPORTS_SMP - config SIBYTE_SB1xxx_SOC bool select IRQ_MIPS_CPU @@ -143,8 +113,7 @@ config SIBYTE_CFE_CONSOLE config SIBYTE_BUS_WATCHER bool "Support for Bus Watcher statistics" depends on SIBYTE_SB1xxx_SOC && \ - (SIBYTE_BCM112X || SIBYTE_SB1250 || \ - SIBYTE_BCM1x55 || SIBYTE_BCM1x80) + (SIBYTE_BCM112X || SIBYTE_SB1250 || SIBYTE_BCM1x80) help Handle and keep statistics on the bus error interrupts (COR_ECC, BAD_ECC, IO_BUS). diff --git a/arch/mips/sibyte/Makefile b/arch/mips/sibyte/Makefile index d015c4d79c3e..47078353fe8a 100644 --- a/arch/mips/sibyte/Makefile +++ b/arch/mips/sibyte/Makefile @@ -6,21 +6,15 @@ obj-$(CONFIG_SIBYTE_BCM112X) += sb1250/ obj-$(CONFIG_SIBYTE_BCM112X) += common/ obj-$(CONFIG_SIBYTE_SB1250) += sb1250/ obj-$(CONFIG_SIBYTE_SB1250) += common/ -obj-$(CONFIG_SIBYTE_BCM1x55) += bcm1480/ -obj-$(CONFIG_SIBYTE_BCM1x55) += common/ obj-$(CONFIG_SIBYTE_BCM1x80) += bcm1480/ obj-$(CONFIG_SIBYTE_BCM1x80) += common/ # -# Sibyte BCM91120x (Carmel) board -# Sibyte BCM91120C (CRhine) board # Sibyte BCM91125C (CRhone) board # Sibyte BCM91125E (Rhone) board # Sibyte SWARM board # Sibyte BCM91x80 (BigSur) board # -obj-$(CONFIG_SIBYTE_CARMEL) += swarm/ -obj-$(CONFIG_SIBYTE_CRHINE) += swarm/ obj-$(CONFIG_SIBYTE_CRHONE) += swarm/ obj-$(CONFIG_SIBYTE_RHONE) += swarm/ obj-$(CONFIG_SIBYTE_SENTOSA) += swarm/ diff --git a/arch/mips/sibyte/Platform b/arch/mips/sibyte/Platform index 65b2225b76b2..937108e41f13 100644 --- a/arch/mips/sibyte/Platform +++ b/arch/mips/sibyte/Platform @@ -13,25 +13,17 @@ cflags-$(CONFIG_SIBYTE_SB1250) += \ -I$(srctree)/arch/mips/include/asm/mach-sibyte \ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL -cflags-$(CONFIG_SIBYTE_BCM1x55) += \ - -I$(srctree)/arch/mips/include/asm/mach-sibyte \ - -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL - cflags-$(CONFIG_SIBYTE_BCM1x80) += \ -I$(srctree)/arch/mips/include/asm/mach-sibyte \ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL # -# Sibyte BCM91120x (Carmel) board -# Sibyte BCM91120C (CRhine) board # Sibyte BCM91125C (CRhone) board # Sibyte BCM91125E (Rhone) board # Sibyte BCM91250A (SWARM) board # Sibyte BCM91250C2 (LittleSur) board # Sibyte BCM91x80 (BigSur) board # -load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000 -load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000 load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000 load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000 load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000 diff --git a/arch/mips/sibyte/common/bus_watcher.c b/arch/mips/sibyte/common/bus_watcher.c index d43291473f76..a296d2c51841 100644 --- a/arch/mips/sibyte/common/bus_watcher.c +++ b/arch/mips/sibyte/common/bus_watcher.c @@ -24,7 +24,7 @@ #include <asm/sibyte/sb1250_regs.h> #include <asm/sibyte/sb1250_int.h> #include <asm/sibyte/sb1250_scd.h> -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 #include <asm/sibyte/bcm1480_regs.h> #endif @@ -71,7 +71,7 @@ void check_bus_watcher(void) #if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250) /* Use non-destructive register */ status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG)); -#elif defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#elif defined(CONFIG_SIBYTE_BCM1x80) /* Use non-destructive register */ /* Same as 1250 except BUS_ERR_STATUS_DEBUG is in a different place. */ status = csr_in32(IOADDR(A_BCM1480_BUS_ERR_STATUS_DEBUG)); diff --git a/arch/mips/sibyte/common/cfe.c b/arch/mips/sibyte/common/cfe.c index 1a504294d85f..2cb90dbbe843 100644 --- a/arch/mips/sibyte/common/cfe.c +++ b/arch/mips/sibyte/common/cfe.c @@ -35,11 +35,6 @@ #endif #endif -#define SIBYTE_MAX_MEM_REGIONS 8 -phys_addr_t board_mem_region_addrs[SIBYTE_MAX_MEM_REGIONS]; -phys_addr_t board_mem_region_sizes[SIBYTE_MAX_MEM_REGIONS]; -unsigned int board_mem_region_count; - int cfe_cons_handle; #ifdef CONFIG_BLK_DEV_INITRD @@ -141,16 +136,6 @@ static __init void prom_meminit(void) size -= 512; memblock_add(addr, size); } - board_mem_region_addrs[board_mem_region_count] = addr; - board_mem_region_sizes[board_mem_region_count] = size; - board_mem_region_count++; - if (board_mem_region_count == - SIBYTE_MAX_MEM_REGIONS) { - /* - * Too many regions. Need to configure more - */ - while(1); - } } } #ifdef CONFIG_BLK_DEV_INITRD @@ -310,7 +295,7 @@ void __init prom_init(void) #if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250) register_smp_ops(&sb_smp_ops); #endif -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 register_smp_ops(&bcm1480_smp_ops); #endif } diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c index ac376dfb4e7c..408db45efdc8 100644 --- a/arch/mips/sibyte/common/sb_tbprof.c +++ b/arch/mips/sibyte/common/sb_tbprof.c @@ -23,7 +23,7 @@ #include <asm/io.h> #include <asm/sibyte/sb1250.h> -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 #include <asm/sibyte/bcm1480_regs.h> #include <asm/sibyte/bcm1480_scd.h> #include <asm/sibyte/bcm1480_int.h> @@ -35,7 +35,7 @@ #error invalid SiByte UART configuration #endif -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 #undef K_INT_TRACE_FREEZE #define K_INT_TRACE_FREEZE K_BCM1480_INT_TRACE_FREEZE #undef K_INT_PERF_CNT @@ -157,7 +157,7 @@ static void arm_tb(void) * a previous interrupt request. This means that bus profiling * requires ALL of the SCD perf counters. */ -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) | /* keep counters 0,2,3,4,5,6,7 as is */ V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */ @@ -290,7 +290,7 @@ static int sbprof_zbprof_start(struct file *filp) * pass them through. I am exploiting my knowledge that * cp0_status masks out IP[5]. krw */ -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 __raw_writeq(K_BCM1480_INT_MAP_I3, IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) + ((K_BCM1480_INT_PERF_CNT & 0x3f) << 3))); @@ -343,7 +343,7 @@ static int sbprof_zbprof_start(struct file *filp) __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7)); /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */ -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 __raw_writeq(1ULL << (K_BCM1480_INT_PERF_CNT & 0x3f), IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_TRACE_L))); #else diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 72a31eeeebba..76683993cdd3 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c @@ -24,7 +24,7 @@ #include <asm/time.h> #include <asm/traps.h> #include <asm/sibyte/sb1250.h> -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 #include <asm/sibyte/bcm1480_regs.h> #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) #include <asm/sibyte/sb1250_regs.h> @@ -34,7 +34,7 @@ #include <asm/sibyte/sb1250_genbus.h> #include <asm/sibyte/board.h> -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 extern void bcm1480_setup(void); #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) extern void sb1250_setup(void); @@ -114,7 +114,7 @@ int update_persistent_clock64(struct timespec64 now) void __init plat_mem_setup(void) { -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 bcm1480_setup(); #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) sb1250_setup(); @@ -146,12 +146,6 @@ void __init plat_mem_setup(void) #ifdef LEDS_PHYS -#ifdef CONFIG_SIBYTE_CARMEL -/* XXXKW need to detect Monterey/LittleSur/etc */ -#undef LEDS_PHYS -#define LEDS_PHYS MLEDS_PHYS -#endif - void setleds(char *str) { void *reg; |