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authorRalf Baechle <ralf@linux-mips.org>2007-10-12 00:46:15 +0200
committerRalf Baechle <ralf@linux-mips.org>2007-10-12 00:46:15 +0200
commit49a89efbbbcc178a39555c43bd59a7593c429664 (patch)
tree93ab78ec340d3f2fe23f9f853edd0bd62dcc64bb /arch/mips/sni/a20r.c
parent[MIPS] Allow hardwiring of the CPU type to a single type for optimization. (diff)
downloadlinux-49a89efbbbcc178a39555c43bd59a7593c429664.tar.xz
linux-49a89efbbbcc178a39555c43bd59a7593c429664.zip
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sni/a20r.c')
-rw-r--r--arch/mips/sni/a20r.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index acc9ba76c1a9..b74607599971 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -127,7 +127,7 @@ static u32 a20r_ack_hwint(void)
{
u32 status = read_c0_status();
- write_c0_status (status | 0x00010000);
+ write_c0_status(status | 0x00010000);
asm volatile(
" .set push \n"
" .set noat \n"
@@ -195,7 +195,7 @@ static void a20r_hwint(void)
u32 cause, status;
int irq;
- clear_c0_status (IE_IRQ0);
+ clear_c0_status(IE_IRQ0);
status = a20r_ack_hwint();
cause = read_c0_cause();
@@ -213,7 +213,7 @@ void __init sni_a20r_irq_init(void)
set_irq_chip(i, &a20r_irq_type);
sni_hwint = a20r_hwint;
change_c0_status(ST0_IM, IE_IRQ0);
- setup_irq (SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
+ setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
}
void sni_a20r_init(void)