diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:15 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:15 +0200 |
| commit | 10cc3529072d5415fb040018a8a99aa7a60190b6 (patch) | |
| tree | fe07fb5112c9c34c2aecfac982155307bc168f07 /arch/mips/vr41xx/common/bcu.c | |
| parent | [MIPS] tlbex: Size optimize code by declaring a few functions inline. (diff) | |
| download | linux-10cc3529072d5415fb040018a8a99aa7a60190b6.tar.xz linux-10cc3529072d5415fb040018a8a99aa7a60190b6.zip | |
[MIPS] Allow hardwiring of the CPU type to a single type for optimization.
This saves a few k on systems which only ever ship with a single CPU type.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/vr41xx/common/bcu.c')
| -rw-r--r-- | arch/mips/vr41xx/common/bcu.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c index ff272b2e8395..d77c330a0d59 100644 --- a/arch/mips/vr41xx/common/bcu.c +++ b/arch/mips/vr41xx/common/bcu.c @@ -70,7 +70,7 @@ EXPORT_SYMBOL_GPL(vr41xx_get_tclock_frequency); static inline uint16_t read_clkspeed(void) { - switch (current_cpu_data.cputype) { + switch (current_cpu_type()) { case CPU_VR4111: case CPU_VR4121: return readw(CLKSPEEDREG_TYPE1); case CPU_VR4122: @@ -88,7 +88,7 @@ static inline unsigned long calculate_pclock(uint16_t clkspeed) { unsigned long pclock = 0; - switch (current_cpu_data.cputype) { + switch (current_cpu_type()) { case CPU_VR4111: case CPU_VR4121: pclock = 18432000 * 64; @@ -138,7 +138,7 @@ static inline unsigned long calculate_vtclock(uint16_t clkspeed, unsigned long p { unsigned long vtclock = 0; - switch (current_cpu_data.cputype) { + switch (current_cpu_type()) { case CPU_VR4111: /* The NEC VR4111 doesn't have the VTClock. */ break; @@ -180,7 +180,7 @@ static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pc { unsigned long tclock = 0; - switch (current_cpu_data.cputype) { + switch (current_cpu_type()) { case CPU_VR4111: if (!(clkspeed & DIV2B)) tclock = pclock / 2; |