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author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:15 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:15 +0200 |
commit | 10cc3529072d5415fb040018a8a99aa7a60190b6 (patch) | |
tree | fe07fb5112c9c34c2aecfac982155307bc168f07 /arch/mips/vr41xx/common/pmu.c | |
parent | [MIPS] tlbex: Size optimize code by declaring a few functions inline. (diff) | |
download | linux-10cc3529072d5415fb040018a8a99aa7a60190b6.tar.xz linux-10cc3529072d5415fb040018a8a99aa7a60190b6.zip |
[MIPS] Allow hardwiring of the CPU type to a single type for optimization.
This saves a few k on systems which only ever ship with a single CPU type.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/vr41xx/common/pmu.c')
-rw-r--r-- | arch/mips/vr41xx/common/pmu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c index ad5b6db53396..028aaf75eb21 100644 --- a/arch/mips/vr41xx/common/pmu.c +++ b/arch/mips/vr41xx/common/pmu.c @@ -62,7 +62,7 @@ static inline void software_reset(void) { uint16_t pmucnt2; - switch (current_cpu_data.cputype) { + switch (current_cpu_type()) { case CPU_VR4122: case CPU_VR4131: case CPU_VR4133: @@ -98,7 +98,7 @@ static int __init vr41xx_pmu_init(void) { unsigned long start, size; - switch (current_cpu_data.cputype) { + switch (current_cpu_type()) { case CPU_VR4111: case CPU_VR4121: start = PMU_TYPE1_BASE; |