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authorRalf Baechle <ralf@linux-mips.org>2016-01-27 18:39:33 +0100
committerRalf Baechle <ralf@linux-mips.org>2016-05-13 14:01:38 +0200
commita48ac3a131c1675de4c8293f59f6864db2a83240 (patch)
treee31414180e650e992c0e871c9d0dc29a0fde4835 /arch/mips/vr41xx
parentMIPS: MSP71xx: Use __flush_cache_all instead of flush_cache_all. (diff)
downloadlinux-a48ac3a131c1675de4c8293f59f6864db2a83240.tar.xz
linux-a48ac3a131c1675de4c8293f59f6864db2a83240.zip
MIPS: VR41xx: Use __flush_cache_all instead of flush_cache_all.
It's probably a good idea to flush caches before reset and by the time this code was written flush_cache_all did actually still do something. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/vr41xx')
-rw-r--r--arch/mips/vr41xx/common/pmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c
index d7f755833c3f..39a0db3e2b34 100644
--- a/arch/mips/vr41xx/common/pmu.c
+++ b/arch/mips/vr41xx/common/pmu.c
@@ -73,7 +73,7 @@ static inline void software_reset(void)
default:
set_c0_status(ST0_BEV | ST0_ERL);
change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
- flush_cache_all();
+ __flush_cache_all();
write_c0_wired(0);
__asm__("jr %0"::"r"(0xbfc00000));
break;