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authorAndrew Isaacson <adi@broadcom.com>2005-10-20 08:56:20 +0200
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 20:32:46 +0200
commit93ce2f524e96571711029884e6340c790a029b94 (patch)
tree1cb69ac513d01b25a2c300c90a2f11c69c0290e9 /arch/mips
parentSibyte header cleanup (diff)
downloadlinux-93ce2f524e96571711029884e6340c790a029b94.tar.xz
linux-93ce2f524e96571711029884e6340c790a029b94.zip
Add support for SB1A CPU.
Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/cpu-probe.c3
-rw-r--r--arch/mips/kernel/proc.c1
-rw-r--r--arch/mips/mm/tlbex.c1
3 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index f7a841573b84..a263fb7a3971 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -623,6 +623,9 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
#endif
break;
+ case PRID_IMP_SB1A:
+ c->cputype = CPU_SB1A;
+ break;
}
}
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index f2b0446e44bc..86fe15b273cd 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -56,6 +56,7 @@ static const char *cpu_name[] = {
[CPU_5KC] = "MIPS 5Kc",
[CPU_R4310] = "R4310",
[CPU_SB1] = "SiByte SB1",
+ [CPU_SB1A] = "SiByte SB1A",
[CPU_TX3912] = "TX3912",
[CPU_TX3922] = "TX3922",
[CPU_TX3927] = "TX3927",
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 240537d263ff..0f9485806bac 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -854,6 +854,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
case CPU_R12000:
case CPU_4KC:
case CPU_SB1:
+ case CPU_SB1A:
case CPU_4KSC:
case CPU_20KC:
case CPU_25KF: