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author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-11-22 16:44:06 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-12-09 05:51:10 +0100 |
commit | 8f7e7d67cbcbcfd2c72d496f01f5e4c78853ef7d (patch) | |
tree | bebad4ebbb4ce264e9dd11f0e643e15491bc315a /arch/mips | |
parent | [MIPS] Alchemy: Fix Au1x SD controller IRQ (diff) | |
download | linux-8f7e7d67cbcbcfd2c72d496f01f5e4c78853ef7d.tar.xz linux-8f7e7d67cbcbcfd2c72d496f01f5e4c78853ef7d.zip |
qemu: do not enable IP7 blindly
IP7 will be enabled automatically in mips_clockevent_init(), if available.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/qemu/q-irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/qemu/q-irq.c b/arch/mips/qemu/q-irq.c index 11f984767880..7df36dbe65c7 100644 --- a/arch/mips/qemu/q-irq.c +++ b/arch/mips/qemu/q-irq.c @@ -33,5 +33,5 @@ void __init arch_init_irq(void) mips_cpu_irq_init(); init_i8259_irqs(); - set_c0_status(0x8400); + set_c0_status(0x400); } |