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authorFlorian Fainelli <florian@openwrt.org>2012-01-31 18:19:04 +0100
committerRalf Baechle <ralf@linux-mips.org>2012-07-23 14:55:53 +0200
commitc1d7f41cfefc0977433b5ed65c6fb71df8ee046b (patch)
tree350a01d12b3b0b609391e7b5ff9b29d96cbd18ac /arch/mips
parentMIPS: Alchemy: use IS_ENABLED() macro (diff)
downloadlinux-c1d7f41cfefc0977433b5ed65c6fb71df8ee046b.tar.xz
linux-c1d7f41cfefc0977433b5ed65c6fb71df8ee046b.zip
MIPS: PNX833x: use IS_ENABLED() macro
Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3332/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/pnx833x/stb22x/board.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/pnx833x/stb22x/board.c b/arch/mips/pnx833x/stb22x/board.c
index 644eb7c3210f..4b328ac43050 100644
--- a/arch/mips/pnx833x/stb22x/board.c
+++ b/arch/mips/pnx833x/stb22x/board.c
@@ -91,7 +91,7 @@ void __init pnx833x_board_setup(void)
pnx833x_gpio_select_function_alt(32);
pnx833x_gpio_select_function_alt(33);
-#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
+#if IS_ENABLED(CONFIG_MTD_NAND_PLATFORM)
/* Setup MIU for NAND access on CS0...
*
* (it seems that we must also configure CS1 for reliable operation,
@@ -117,7 +117,7 @@ void __init pnx833x_board_setup(void)
pnx833x_gpio_select_output(5);
pnx833x_gpio_write(1, 5);
-#elif defined(CONFIG_MTD_CFI) || defined(CONFIG_MTD_CFI_MODULE)
+#elif IS_ENABLED(CONFIG_MTD_CFI)
/* Set up MIU for 16-bit NOR access on CS0 and CS1... */