diff options
author | Felix Fietkau <nbd@openwrt.org> | 2013-09-27 14:41:44 +0200 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-01-22 20:43:10 +0100 |
commit | 885014bcf284cdfbe3428f2cfa3882edde5ff5fa (patch) | |
tree | cb0eeee346b51eb7af6c8cf8c49a046bb937f296 /arch/mips | |
parent | MIPS: APRP: Code formatting clean-ups. (diff) | |
download | linux-885014bcf284cdfbe3428f2cfa3882edde5ff5fa.tar.xz linux-885014bcf284cdfbe3428f2cfa3882edde5ff5fa.zip |
MIPS: improve checks for noncoherent DMA
Only one MIPS development board actually supports enabling/disabling DMA
coherency at runtime, so it's not a good idea to push the overhead of
checking that configuration setting onto every other supported target as
well.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5912/
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/dma-coherence.h | 9 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-generic/dma-coherence.h | 4 | ||||
-rw-r--r-- | arch/mips/mm/dma-default.c | 2 |
4 files changed, 16 insertions, 5 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a7ec153be0b9..57a887334a65 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -301,7 +301,7 @@ config MIPS_MALTA select CEVT_R4K select CSRC_R4K select CSRC_GIC - select DMA_NONCOHERENT + select DMA_MAYBE_COHERENT select GENERIC_ISA_DMA select HAVE_PCSPKR_PLATFORM select IRQ_CPU @@ -893,6 +893,10 @@ config FW_CFE config ARCH_DMA_ADDR_T_64BIT def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT +config DMA_MAYBE_COHERENT + select DMA_NONCOHERENT + bool + config DMA_COHERENT bool diff --git a/arch/mips/include/asm/dma-coherence.h b/arch/mips/include/asm/dma-coherence.h index 242cbb3ca582..bc5e85d579e6 100644 --- a/arch/mips/include/asm/dma-coherence.h +++ b/arch/mips/include/asm/dma-coherence.h @@ -9,7 +9,16 @@ #ifndef __ASM_DMA_COHERENCE_H #define __ASM_DMA_COHERENCE_H +#ifdef CONFIG_DMA_MAYBE_COHERENT extern int coherentio; extern int hw_coherentio; +#else +#ifdef CONFIG_DMA_COHERENT +#define coherentio 1 +#else +#define coherentio 0 +#endif +#define hw_coherentio 0 +#endif /* CONFIG_DMA_MAYBE_COHERENT */ #endif diff --git a/arch/mips/include/asm/mach-generic/dma-coherence.h b/arch/mips/include/asm/mach-generic/dma-coherence.h index a9e8f6b62b0b..7629c35986f7 100644 --- a/arch/mips/include/asm/mach-generic/dma-coherence.h +++ b/arch/mips/include/asm/mach-generic/dma-coherence.h @@ -49,11 +49,7 @@ static inline int plat_dma_supported(struct device *dev, u64 mask) static inline int plat_device_is_coherent(struct device *dev) { -#ifdef CONFIG_DMA_COHERENT - return 1; -#else return coherentio; -#endif } #ifdef CONFIG_SWIOTLB diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index 2e9418562258..44b6dff5aba2 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -23,6 +23,7 @@ #include <dma-coherence.h> +#ifdef CONFIG_DMA_MAYBE_COHERENT int coherentio = 0; /* User defined DMA coherency from command line. */ EXPORT_SYMBOL_GPL(coherentio); int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */ @@ -42,6 +43,7 @@ static int __init setnocoherentio(char *str) return 0; } early_param("nocoherentio", setnocoherentio); +#endif static inline struct page *dma_addr_to_page(struct device *dev, dma_addr_t dma_addr) |