diff options
| author | David Daney <ddaney@caviumnetworks.com> | 2010-10-08 01:03:41 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-10-29 20:08:34 +0200 |
| commit | a70b13a9f07ae0e21870ed3e9b6829f556579c5c (patch) | |
| tree | e15268066b0b35a0791c76568156812b8973dab4 /arch/mips | |
| parent | MIPS: Octeon: Update register definitions for CN63XX chips (diff) | |
| download | linux-a70b13a9f07ae0e21870ed3e9b6829f556579c5c.tar.xz linux-a70b13a9f07ae0e21870ed3e9b6829f556579c5c.zip | |
MIPS: Octeon: Add cn63XX to Octeon chip detection macros.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1661/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/octeon/octeon-model.h | 36 |
1 files changed, 28 insertions, 8 deletions
diff --git a/arch/mips/include/asm/octeon/octeon-model.h b/arch/mips/include/asm/octeon/octeon-model.h index cf50336eca2e..700f88e31cad 100644 --- a/arch/mips/include/asm/octeon/octeon-model.h +++ b/arch/mips/include/asm/octeon/octeon-model.h @@ -35,14 +35,6 @@ #ifndef __OCTEON_MODEL_H__ #define __OCTEON_MODEL_H__ -/* NOTE: These must match what is checked in common-config.mk */ -/* Defines to represent the different versions of Octeon. */ - -/* - * IMPORTANT: When the default pass is updated for an Octeon Model, - * the corresponding change must also be made in the oct-sim script. - */ - /* * The defines below should be used with the OCTEON_IS_MODEL() macro * to determine what model of chip the software is running on. Models @@ -71,6 +63,21 @@ #define OM_IGNORE_MINOR_REVISION 0x08000000 #define OM_FLAG_MASK 0xff000000 +#define OM_MATCH_5XXX_FAMILY_MODELS 0x20000000 /* Match all cn5XXX Octeon models. */ +#define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000 /* Match all cn6XXX Octeon models. */ + +/* + * CN6XXX models with new revision encoding + */ +#define OCTEON_CN63XX_PASS1_0 0x000d9000 +#define OCTEON_CN63XX_PASS1_1 0x000d9001 +#define OCTEON_CN63XX_PASS1_2 0x000d9002 +#define OCTEON_CN63XX_PASS2_0 0x000d9008 + +#define OCTEON_CN63XX (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_REVISION) +#define OCTEON_CN63XX_PASS1_X (OCTEON_CN63XX_PASS1_0 | OM_IGNORE_MINOR_REVISION) +#define OCTEON_CN63XX_PASS2_X (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_MINOR_REVISION) + /* * CN5XXX models with new revision encoding */ @@ -189,6 +196,9 @@ | OM_MATCH_PREVIOUS_MODELS \ | OM_IGNORE_REVISION) +#define OCTEON_CN5XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS) +#define OCTEON_CN6XXX (OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS) + /* The revision byte (low byte) has two different encodings. * CN3XXX: * @@ -222,6 +232,7 @@ | OCTEON_58XX_MODEL_MASK) #define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK \ & 0x00fffff8) +#define OCTEON_5XXX_MODEL_MASK 0x00ff0fc0 #define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z))) @@ -273,6 +284,15 @@ static inline int __OCTEON_IS_MODEL_COMPILE__(uint32_t arg_model, __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_REV_MASK)) return 1; + + if (((arg_model & OM_MATCH_5XXX_FAMILY_MODELS) == OM_MATCH_5XXX_FAMILY_MODELS) && + ((chip_model) >= OCTEON_CN58XX_PASS1_0) && ((chip_model) < OCTEON_CN63XX_PASS1_0)) + return 1; + + if (((arg_model & OM_MATCH_6XXX_FAMILY_MODELS) == OM_MATCH_6XXX_FAMILY_MODELS) && + ((chip_model) >= OCTEON_CN63XX_PASS1_0)) + return 1; + if ((arg_model & OM_MATCH_PREVIOUS_MODELS) && ((chip_model & OCTEON_58XX_MODEL_MASK) < (arg_model & OCTEON_58XX_MODEL_MASK))) |