diff options
| author | John Crispin <blogic@openwrt.org> | 2015-11-04 11:50:14 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-11-11 08:38:15 +0100 |
| commit | 69ebed7dc9311ea383dd0b9542c823a51b20e679 (patch) | |
| tree | b9e177ec7a377fc304470bff308da8781a1c00df /arch/mips | |
| parent | MIPS: ralink: Put the pci bus into reset state before rebooting the SoC (diff) | |
| download | linux-69ebed7dc9311ea383dd0b9542c823a51b20e679.tar.xz linux-69ebed7dc9311ea383dd0b9542c823a51b20e679.zip | |
MIPS: ralink: Add missing clock on rt305x
The rt305x support is missing a clock required by the ethernet driver.
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11447/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/ralink/rt305x.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c index 7e11f001e8ff..9e4572592065 100644 --- a/arch/mips/ralink/rt305x.c +++ b/arch/mips/ralink/rt305x.c @@ -199,6 +199,7 @@ void __init ralink_clk_init(void) } ralink_clk_add("cpu", cpu_rate); + ralink_clk_add("sys", sys_rate); ralink_clk_add("10000b00.spi", sys_rate); ralink_clk_add("10000100.timer", wdt_rate); ralink_clk_add("10000120.watchdog", wdt_rate); |