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author | David Daney <ddaney@caviumnetworks.com> | 2009-05-28 02:47:46 +0200 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-06-17 12:06:31 +0200 |
commit | 9cffd154cf6817b130762501b91e753524ba2cd4 (patch) | |
tree | 909da4068e99b7e32282c07bf005e5a36d17d6fc /arch/mips | |
parent | Hugetlbfs: Enable hugetlbfs for more systems in Kconfig. (diff) | |
download | linux-9cffd154cf6817b130762501b91e753524ba2cd4.tar.xz linux-9cffd154cf6817b130762501b91e753524ba2cd4.zip |
MIPS: Kconfig Add SYS_SUPPORTS_HUGETLBFS and enable it for some systems.
Add new kconfig variables SYS_SUPPORTS_HUGETLBFS and
CPU_SUPPORTS_HUGEPAGES. They are enabled for systems that are known
to support huge pages.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 96f05e588f4c..cebebf151a14 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -853,6 +853,11 @@ config SYS_SUPPORTS_BIG_ENDIAN config SYS_SUPPORTS_LITTLE_ENDIAN bool +config SYS_SUPPORTS_HUGETLBFS + bool + depends on CPU_SUPPORTS_HUGEPAGES && 64BIT + default y + config IRQ_CPU bool @@ -1057,6 +1062,7 @@ config CPU_MIPS64_R1 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES help Choose this option to build a kernel for release 1 or later of the MIPS64 architecture. Many modern embedded systems with a 64-bit @@ -1076,6 +1082,7 @@ config CPU_MIPS64_R2 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES help Choose this option to build a kernel for release 2 or later of the MIPS64 architecture. Many modern embedded systems with a 64-bit @@ -1162,6 +1169,7 @@ config CPU_R5500 select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HUGEPAGES help NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV instruction set. @@ -1247,6 +1255,7 @@ config CPU_CAVIUM_OCTEON select WEAK_ORDERING select WEAK_REORDERING_BEYOND_LLSC select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES help The Cavium Octeon processor is a highly integrated chip containing many ethernet hardware widgets for networking tasks. The processor @@ -1366,6 +1375,8 @@ config CPU_SUPPORTS_32BIT_KERNEL bool config CPU_SUPPORTS_64BIT_KERNEL bool +config CPU_SUPPORTS_HUGEPAGES + bool # # Set to y for ptrace access to watch registers. |