diff options
author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2014-04-08 13:28:02 +0200 |
---|---|---|
committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2014-04-08 13:28:02 +0200 |
commit | fe10739284bae68b57d3dbcad81f34772cfd2716 (patch) | |
tree | 896fa694b7f6a46266ff8eb5291c35781be53e25 /arch/mips | |
parent | Merge branch 'pm-cpuidle' (diff) | |
parent | cpufreq: ppc: Remove duplicate inclusion of fsl_soc.h (diff) | |
download | linux-fe10739284bae68b57d3dbcad81f34772cfd2716.tar.xz linux-fe10739284bae68b57d3dbcad81f34772cfd2716.zip |
Merge branch 'pm-cpufreq'
* pm-cpufreq:
cpufreq: ppc: Remove duplicate inclusion of fsl_soc.h
cpufreq: create another field .flags in cpufreq_frequency_table
cpufreq: use kzalloc() to allocate memory for cpufreq_frequency_table
cpufreq: don't print value of .driver_data from core
cpufreq: ia64: don't set .driver_data to index
cpufreq: powernv: Select CPUFreq related Kconfig options for powernv
cpufreq: powernv: Use cpufreq_frequency_table.driver_data to store pstate ids
cpufreq: powernv: cpufreq driver for powernv platform
cpufreq: at32ap: don't declare local variable as static
cpufreq: loongson2_cpufreq: don't declare local variable as static
cpufreq: unicore32: fix typo issue for 'clk'
cpufreq: exynos: Disable on multiplatform build
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/loongson/lemote-2f/clock.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/mips/loongson/lemote-2f/clock.c b/arch/mips/loongson/lemote-2f/clock.c index aed32b88576c..e1f427f4f5f3 100644 --- a/arch/mips/loongson/lemote-2f/clock.c +++ b/arch/mips/loongson/lemote-2f/clock.c @@ -28,16 +28,16 @@ enum { }; struct cpufreq_frequency_table loongson2_clockmod_table[] = { - {DC_RESV, CPUFREQ_ENTRY_INVALID}, - {DC_ZERO, CPUFREQ_ENTRY_INVALID}, - {DC_25PT, 0}, - {DC_37PT, 0}, - {DC_50PT, 0}, - {DC_62PT, 0}, - {DC_75PT, 0}, - {DC_87PT, 0}, - {DC_DISABLE, 0}, - {DC_RESV, CPUFREQ_TABLE_END}, + {0, DC_RESV, CPUFREQ_ENTRY_INVALID}, + {0, DC_ZERO, CPUFREQ_ENTRY_INVALID}, + {0, DC_25PT, 0}, + {0, DC_37PT, 0}, + {0, DC_50PT, 0}, + {0, DC_62PT, 0}, + {0, DC_75PT, 0}, + {0, DC_87PT, 0}, + {0, DC_DISABLE, 0}, + {0, DC_RESV, CPUFREQ_TABLE_END}, }; EXPORT_SYMBOL_GPL(loongson2_clockmod_table); |