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authorHuacai Chen <chenhc@lemote.com>2015-03-12 04:51:06 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-03-25 13:47:55 +0100
commit0add9c2f1cff9f3f1f2eb7e9babefa872a9d14b9 (patch)
treefd95453b9ab36e857f096df17a18327783d59ef6 /arch/mips
parentMIPS: BCM63xx: Move bcm63xx_gpio_init() to bcm63xx_register_devices(). (diff)
downloadlinux-0add9c2f1cff9f3f1f2eb7e9babefa872a9d14b9.tar.xz
linux-0add9c2f1cff9f3f1f2eb7e9babefa872a9d14b9.zip
MIPS: Loongson-3: Add IRQF_NO_SUSPEND to Cascade irqaction
HPET irq is routed to i8259 and then to MIPS CPU irq (cascade). After commit a3e6c1eff5 (MIPS: IRQ: Fix disable_irq on CPU IRQs), if without IRQF_NO_SUSPEND in cascade_irqaction, HPET interrupts will lost during suspend. The result is machine cannot be waken up. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: <stable@vger.kernel.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9528/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/loongson/loongson-3/irq.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/loongson/loongson-3/irq.c b/arch/mips/loongson/loongson-3/irq.c
index 21221edda7a9..0f75b6b3d218 100644
--- a/arch/mips/loongson/loongson-3/irq.c
+++ b/arch/mips/loongson/loongson-3/irq.c
@@ -44,6 +44,7 @@ void mach_irq_dispatch(unsigned int pending)
static struct irqaction cascade_irqaction = {
.handler = no_action,
+ .flags = IRQF_NO_SUSPEND,
.name = "cascade",
};