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authorJohn Crispin <blogic@openwrt.org>2013-04-13 15:37:37 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-05-08 01:19:11 +0200
commit38d5b81cde857a051efa73d56bf195fcf3f24a06 (patch)
tree90aa458c99457e436ab47b00a39c8373c2b2d801 /arch/mips
parentMIPS: ralink: add memory definition for RT305x (diff)
downloadlinux-38d5b81cde857a051efa73d56bf195fcf3f24a06.tar.xz
linux-38d5b81cde857a051efa73d56bf195fcf3f24a06.zip
MIPS: ralink: add memory definition for RT2880
Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5181/
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/mach-ralink/rt288x.h4
-rw-r--r--arch/mips/ralink/rt288x.c4
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ralink/rt288x.h b/arch/mips/include/asm/mach-ralink/rt288x.h
index ad8b42dd2fcc..03ad716acb42 100644
--- a/arch/mips/include/asm/mach-ralink/rt288x.h
+++ b/arch/mips/include/asm/mach-ralink/rt288x.h
@@ -46,4 +46,8 @@
#define CLKCFG_SRAM_CS_N_WDT BIT(9)
+#define RT2880_SDRAM_BASE 0x08000000
+#define RT2880_MEM_SIZE_MIN 2
+#define RT2880_MEM_SIZE_MAX 128
+
#endif
diff --git a/arch/mips/ralink/rt288x.c b/arch/mips/ralink/rt288x.c
index 1e0788e75af6..f87de1ab2198 100644
--- a/arch/mips/ralink/rt288x.c
+++ b/arch/mips/ralink/rt288x.c
@@ -136,4 +136,8 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
name,
(id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
(id & CHIP_ID_REV_MASK));
+
+ soc_info->mem_base = RT2880_SDRAM_BASE;
+ soc_info->mem_size_min = RT2880_MEM_SIZE_MIN;
+ soc_info->mem_size_max = RT2880_MEM_SIZE_MAX;
}