diff options
| author | Christoph Hellwig <hch@lst.de> | 2019-08-17 09:32:31 +0200 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-08-31 18:12:26 +0200 |
| commit | 60af0d94cc37287525c396d87e942a52b742743f (patch) | |
| tree | c1072606e0be56edcc0d2f888aa586fc737f8827 /arch/mips | |
| parent | mips/atomic: Fix smp_mb__{before,after}_atomic() (diff) | |
| download | linux-60af0d94cc37287525c396d87e942a52b742743f.tar.xz linux-60af0d94cc37287525c396d87e942a52b742743f.zip | |
mips: remove ioremap_cachable
Just define ioremap_cache directly.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Guo Ren <guoren@kernel.org>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Greentime Hu <green.hu@gmail.com>
Cc: Vincent Chen <deanbo422@gmail.com>
Cc: Guan Xuetao <gxt@pku.edu.cn>
Cc: linux-mips@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/io.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index d58ff2229738..2b7b56736372 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -252,11 +252,11 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, #define ioremap_uc ioremap_nocache /* - * ioremap_cachable - map bus memory into CPU space + * ioremap_cache - map bus memory into CPU space * @offset: bus address of the memory * @size: size of the resource to map * - * ioremap_nocache performs a platform specific sequence of operations to + * ioremap_cache performs a platform specific sequence of operations to * make bus memory CPU accessible via the readb/readw/readl/writeb/ * writew/writel functions and the other mmio helpers. The returned * address is not guaranteed to be usable directly as a virtual @@ -266,9 +266,8 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, * the CPU. Also enables full write-combining. Useful for some * memory-like regions on I/O busses. */ -#define ioremap_cachable(offset, size) \ +#define ioremap_cache(offset, size) \ __ioremap_mode((offset), (size), _page_cachable_default) -#define ioremap_cache ioremap_cachable /* * ioremap_wc - map bus memory into CPU space |