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| author | John Crispin <blogic@openwrt.org> | 2013-04-13 15:10:14 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-08 01:19:11 +0200 |
| commit | 629e39eec88a6da187674816bf9d8fe960b07db5 (patch) | |
| tree | 6e6b27b451039f02c266aa0d1a4a79ada3b984cf /arch/mips | |
| parent | MIPS: add detect_memory_region() (diff) | |
| download | linux-629e39eec88a6da187674816bf9d8fe960b07db5.tar.xz linux-629e39eec88a6da187674816bf9d8fe960b07db5.zip | |
MIPS: ralink: add memory definition to struct ralink_soc_info
Depending on the actual SoC we have a different base address as well as minimum
and maximum size for RAM. Add these fields to the per SoC structure.
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5179/
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/ralink/common.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/ralink/common.h b/arch/mips/ralink/common.h index 299119b294ca..83144c3fc5ac 100644 --- a/arch/mips/ralink/common.h +++ b/arch/mips/ralink/common.h @@ -33,6 +33,11 @@ extern struct ralink_pinmux rt_gpio_pinmux; struct ralink_soc_info { unsigned char sys_type[RAMIPS_SYS_TYPE_LEN]; unsigned char *compatible; + + unsigned long mem_base; + unsigned long mem_size; + unsigned long mem_size_min; + unsigned long mem_size_max; }; extern struct ralink_soc_info soc_info; |