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| author | Paul Burton <paul.burton@mips.com> | 2018-10-15 20:33:19 +0200 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2018-10-16 08:11:12 +0200 |
| commit | 7b2d13f2e24002c5113d30993c5297cb4fea1437 (patch) | |
| tree | be08bdea8b298965b7d60e719d408fece1ae7b7b /arch/mips | |
| parent | MIPS: Provide actually relaxed MMIO accessors (diff) | |
| download | linux-7b2d13f2e24002c5113d30993c5297cb4fea1437.tar.xz linux-7b2d13f2e24002c5113d30993c5297cb4fea1437.zip | |
MIPS: Remove unused MOVN & MOVZ macros
We have macros in asm/asm.h to allow for use of the MOVN & MOVZ
instructions with compare-and-branch sequences providing compatibility
for ISA versions which don't include those instructions. However the
macros are unused, and appear to have always been unused. Delete the
dead code.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20909/
Cc: linux-mips@linux-mips.org
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/asm.h | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h index 81fae23ce7cd..4e4f60597c72 100644 --- a/arch/mips/include/asm/asm.h +++ b/arch/mips/include/asm/asm.h @@ -177,49 +177,6 @@ symbol = value #endif /* !CONFIG_CPU_HAS_PREFETCH */ /* - * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs. - */ -#if (_MIPS_ISA == _MIPS_ISA_MIPS1) -#define MOVN(rd, rs, rt) \ - .set push; \ - .set reorder; \ - beqz rt, 9f; \ - move rd, rs; \ - .set pop; \ -9: -#define MOVZ(rd, rs, rt) \ - .set push; \ - .set reorder; \ - bnez rt, 9f; \ - move rd, rs; \ - .set pop; \ -9: -#endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */ -#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) -#define MOVN(rd, rs, rt) \ - .set push; \ - .set noreorder; \ - bnezl rt, 9f; \ - move rd, rs; \ - .set pop; \ -9: -#define MOVZ(rd, rs, rt) \ - .set push; \ - .set noreorder; \ - beqzl rt, 9f; \ - move rd, rs; \ - .set pop; \ -9: -#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */ -#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \ - (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64) -#define MOVN(rd, rs, rt) \ - movn rd, rs, rt -#define MOVZ(rd, rs, rt) \ - movz rd, rs, rt -#endif /* MIPS IV, MIPS V, MIPS32 or MIPS64 */ - -/* * Stack alignment */ #if (_MIPS_SIM == _MIPS_SIM_ABI32) |