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authorMaciej W. Rozycki <macro@linux-mips.org>2018-11-01 08:54:24 +0100
committerPaul Burton <paul.burton@mips.com>2018-11-05 19:08:13 +0100
commitd01501f85249848a2497968d46dd46d5c6fe32e6 (patch)
tree1220e311780a26fe3c3c69c662dc76d014c47722 /arch/mips
parentMIPS: OCTEON: fix out of bounds array access on CN68XX (diff)
downloadlinux-d01501f85249848a2497968d46dd46d5c6fe32e6.tar.xz
linux-d01501f85249848a2497968d46dd46d5c6fe32e6.zip
MIPS: Fix `dma_alloc_coherent' returning a non-coherent allocation
Fix a MIPS `dma_alloc_coherent' regression from commit bc3ec75de545 ("dma-mapping: merge direct and noncoherent ops") that causes a cached allocation to be returned on noncoherent cache systems. This is due to an inverted check now used in the MIPS implementation of `arch_dma_alloc' on the result from `dma_direct_alloc_pages' before doing the cached-to-uncached mapping of the allocation address obtained. The mapping has to be done for a non-NULL rather than NULL result, because a NULL result means the allocation has failed. Invert the check for correct operation then. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Fixes: bc3ec75de545 ("dma-mapping: merge direct and noncoherent ops") Patchwork: https://patchwork.linux-mips.org/patch/20965/
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/mm/dma-noncoherent.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c
index e6c9485cadcf..cb38461391cb 100644
--- a/arch/mips/mm/dma-noncoherent.c
+++ b/arch/mips/mm/dma-noncoherent.c
@@ -50,7 +50,7 @@ void *arch_dma_alloc(struct device *dev, size_t size,
void *ret;
ret = dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
- if (!ret && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
+ if (ret && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
dma_cache_wback_inv((unsigned long) ret, size);
ret = (void *)UNCAC_ADDR(ret);
}