diff options
| author | Akira Takeuchi <takeuchi.akr@jp.panasonic.com> | 2010-10-27 18:28:44 +0200 |
|---|---|---|
| committer | David Howells <dhowells@redhat.com> | 2010-10-27 18:28:44 +0200 |
| commit | 9b287bf9924cedaf1accd7293db3627bef7c46e3 (patch) | |
| tree | 116b52c64156aea7aa2236fd3e030e4885f7c2d8 /arch/mn10300/include/asm/cacheflush.h | |
| parent | MN10300: AM34: The current cacheflush routines operate by controlling tag regs (diff) | |
| download | linux-9b287bf9924cedaf1accd7293db3627bef7c46e3.tar.xz linux-9b287bf9924cedaf1accd7293db3627bef7c46e3.zip | |
MN10300: Cacheflush functions should take unsigned long addresses
The functions that perform cache flushing should take addresses of unsigned
long type, not unsigned int.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/mn10300/include/asm/cacheflush.h')
| -rw-r--r-- | arch/mn10300/include/asm/cacheflush.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/mn10300/include/asm/cacheflush.h b/arch/mn10300/include/asm/cacheflush.h index 0b5d00438374..a9f41688961a 100644 --- a/arch/mn10300/include/asm/cacheflush.h +++ b/arch/mn10300/include/asm/cacheflush.h @@ -22,18 +22,18 @@ #ifdef CONFIG_MN10300_CACHE_ENABLED extern void mn10300_icache_inv(void); extern void mn10300_dcache_inv(void); -extern void mn10300_dcache_inv_page(unsigned start); -extern void mn10300_dcache_inv_range(unsigned start, unsigned end); -extern void mn10300_dcache_inv_range2(unsigned start, unsigned size); +extern void mn10300_dcache_inv_page(unsigned long start); +extern void mn10300_dcache_inv_range(unsigned long start, unsigned long end); +extern void mn10300_dcache_inv_range2(unsigned long start, unsigned long size); #ifdef CONFIG_MN10300_CACHE_WBACK extern void mn10300_dcache_flush(void); -extern void mn10300_dcache_flush_page(unsigned start); -extern void mn10300_dcache_flush_range(unsigned start, unsigned end); -extern void mn10300_dcache_flush_range2(unsigned start, unsigned size); +extern void mn10300_dcache_flush_page(unsigned long start); +extern void mn10300_dcache_flush_range(unsigned long start, unsigned long end); +extern void mn10300_dcache_flush_range2(unsigned long start, unsigned long size); extern void mn10300_dcache_flush_inv(void); -extern void mn10300_dcache_flush_inv_page(unsigned start); -extern void mn10300_dcache_flush_inv_range(unsigned start, unsigned end); -extern void mn10300_dcache_flush_inv_range2(unsigned start, unsigned size); +extern void mn10300_dcache_flush_inv_page(unsigned long start); +extern void mn10300_dcache_flush_inv_range(unsigned long start, unsigned long end); +extern void mn10300_dcache_flush_inv_range2(unsigned long start, unsigned long size); #else #define mn10300_dcache_flush() do {} while (0) #define mn10300_dcache_flush_page(start) do {} while (0) |