diff options
| author | Akira Takeuchi <takeuchi.akr@jp.panasonic.com> | 2010-10-27 18:28:51 +0200 |
|---|---|---|
| committer | David Howells <dhowells@redhat.com> | 2010-10-27 18:28:51 +0200 |
| commit | 965ea4bbb9ae926358273368144ba838c561bc38 (patch) | |
| tree | c6ee08f2f2970bb500ccc7cf58de6beea870e4f8 /arch/mn10300/mm/Makefile | |
| parent | MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control (diff) | |
| download | linux-965ea4bbb9ae926358273368144ba838c561bc38.tar.xz linux-965ea4bbb9ae926358273368144ba838c561bc38.zip | |
MN10300: SMP TLB flushing
Implement global TLB flushing for MN10300. This will be used by the AM34 which
is SMP capable.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/mn10300/mm/Makefile')
| -rw-r--r-- | arch/mn10300/mm/Makefile | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mn10300/mm/Makefile b/arch/mn10300/mm/Makefile index 184745f94c32..203fee23f7d7 100644 --- a/arch/mn10300/mm/Makefile +++ b/arch/mn10300/mm/Makefile @@ -18,3 +18,5 @@ cacheflush-$(CONFIG_MN10300_CACHE_DISABLED) := cache-disabled.o obj-y := \ init.o fault.o pgtable.o extable.o tlb-mn10300.o mmu-context.o \ misalignment.o dma-alloc.o $(cacheflush-y) + +obj-$(CONFIG_SMP) += tlb-smp.o |