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authorRich Felker <dalias@libc.org>2016-02-15 19:36:13 +0100
committerRich Felker <dalias@libc.org>2016-08-05 05:29:39 +0200
commitb4214e41b7152b1964a3421a40251d202ae2d2c0 (patch)
treeedfab19d4f16bf2d6f42168c6598aa1fac4ac0e3 /arch/nios2
parentsh: SMP support for SH2 entry.S (diff)
downloadlinux-b4214e41b7152b1964a3421a40251d202ae2d2c0.tar.xz
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sh: add SMP support for J2
Support is hooked up via a cpu start method specified in the device tree, and also depends on DT nodes that describe the interfaces for performing IPI and identifying which cpu execution is taking place on. The currently used method is a form of spin table, where secondary cpus are unblocked by writing to a special address. Signed-off-by: Rich Felker <dalias@libc.org>
Diffstat (limited to 'arch/nios2')
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