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authorFilip Kokosinski <fkokosinski@antmicro.com>2019-09-19 13:42:45 +0200
committerStafford Horne <shorne@gmail.com>2020-11-11 22:31:04 +0100
commitf81cc5ac8c2b5c0e2e190ea181ab2b9e5cf8497d (patch)
tree77345f67ba48197dcd535b05c12122ebf105fcad /arch/openrisc
parentdrivers/tty/serial: add LiteUART driver (diff)
downloadlinux-f81cc5ac8c2b5c0e2e190ea181ab2b9e5cf8497d.tar.xz
linux-f81cc5ac8c2b5c0e2e190ea181ab2b9e5cf8497d.zip
openrisc: add support for LiteX
This adds support for a basic LiteX-based SoC with a mor1kx soft CPU. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com> [shorne: Merged in soc-cntl patch, removed CROSS_COMPILE, sort MAINT.] Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'arch/openrisc')
-rw-r--r--arch/openrisc/boot/dts/or1klitex.dts55
-rw-r--r--arch/openrisc/configs/or1klitex_defconfig18
2 files changed, 73 insertions, 0 deletions
diff --git a/arch/openrisc/boot/dts/or1klitex.dts b/arch/openrisc/boot/dts/or1klitex.dts
new file mode 100644
index 000000000000..3f9867aa3844
--- /dev/null
+++ b/arch/openrisc/boot/dts/or1klitex.dts
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * LiteX-based System on Chip
+ *
+ * Copyright (C) 2019 Antmicro <www.antmicro.com>
+ */
+
+/dts-v1/;
+/ {
+ compatible = "opencores,or1ksim";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&pic>;
+
+ aliases {
+ serial0 = &serial0;
+ };
+
+ chosen {
+ bootargs = "console=liteuart";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ compatible = "opencores,or1200-rtlsvn481";
+ reg = <0>;
+ clock-frequency = <100000000>;
+ };
+ };
+
+ pic: pic {
+ compatible = "opencores,or1k-pic";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+
+ serial0: serial@e0002000 {
+ device_type = "serial";
+ compatible = "litex,liteuart";
+ reg = <0xe0002000 0x100>;
+ };
+
+ soc_ctrl0: soc_controller@e0000000 {
+ compatible = "litex,soc-controller";
+ reg = <0xe0000000 0xc>;
+ status = "okay";
+ };
+};
diff --git a/arch/openrisc/configs/or1klitex_defconfig b/arch/openrisc/configs/or1klitex_defconfig
new file mode 100644
index 000000000000..3c2c70d3d740
--- /dev/null
+++ b/arch/openrisc/configs/or1klitex_defconfig
@@ -0,0 +1,18 @@
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
+CONFIG_BUG_ON_DATA_CORRUPTION=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_EMBEDDED=y
+CONFIG_HZ_100=y
+CONFIG_INITRAMFS_SOURCE="openrisc-rootfs.cpio.gz"
+CONFIG_OF_OVERLAY=y
+CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"
+CONFIG_PANIC_ON_OOPS=y
+CONFIG_PRINTK_TIME=y
+CONFIG_LITEX_SOC_CONTROLLER=y
+CONFIG_SERIAL_LITEUART=y
+CONFIG_SERIAL_LITEUART_CONSOLE=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_TTY_PRINTK=y