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authorHelge Deller <deller@gmx.de>2019-05-10 17:00:01 +0200
committerHelge Deller <deller@gmx.de>2019-05-10 21:00:44 +0200
commit8d0e051cc75e2b1a7e2fd51fc56af332c9619618 (patch)
treeccf08363081a35a3cd8fb4ada4b62cc5fefb1840 /arch/parisc/include
parentparisc: Drop LDCW barrier in CAS code when running UP (diff)
downloadlinux-8d0e051cc75e2b1a7e2fd51fc56af332c9619618.tar.xz
linux-8d0e051cc75e2b1a7e2fd51fc56af332c9619618.zip
parisc: Enable the ro_after_init feature
This patch modifies the initial page mapping functions in the following way: During bootup the init, text and data pages will be mapped RWX and if supported, with huge pages. At final stage of the bootup, the kernel calls free_initmem() and then all pages will be remapped either R-X (for text and read-only data) or RW- (for data). The __init pages will be dropped. This reflects the behaviour of the x86 platform. Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'arch/parisc/include')
-rw-r--r--arch/parisc/include/asm/cache.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h
index 4016fe1c65a9..73ca89a47f49 100644
--- a/arch/parisc/include/asm/cache.h
+++ b/arch/parisc/include/asm/cache.h
@@ -24,9 +24,6 @@
#define __read_mostly __attribute__((__section__(".data..read_mostly")))
-/* Read-only memory is marked before mark_rodata_ro() is called. */
-#define __ro_after_init __read_mostly
-
void parisc_cache_init(void); /* initializes cache-flushing */
void disable_sr_hashing_asm(int); /* low level support for above */
void disable_sr_hashing(void); /* turns off space register hashing */