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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-29 20:30:45 +0200 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-29 20:30:45 +0200 |
commit | 4d3ce21fa9d2eaeda113aa2f9c2da80d972bef64 (patch) | |
tree | 9ffa5af467d6e9f6f6c8eb496489bf882613a459 /arch/parisc/kernel/traps.c | |
parent | Merge branch 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6 (diff) | |
parent | [PARISC] Move os_id_to_string() inside #ifndef __ASSEMBLY__ (diff) | |
download | linux-4d3ce21fa9d2eaeda113aa2f9c2da80d972bef64.tar.xz linux-4d3ce21fa9d2eaeda113aa2f9c2da80d972bef64.zip |
Merge master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6: (23 commits)
[PARISC] Move os_id_to_string() inside #ifndef __ASSEMBLY__
[PARISC] Fix do_gettimeofday() hang
[PARISC] Fix PCREL22F relocation problem for most modules
[PARISC] Refactor show_regs in traps.c
[PARISC] Add os_id_to_string helper
[PARISC] OS_ID_LINUX == 0x0006
[PARISC] Ensure Space ID hashing is turned off
[PARISC] Match show_cache_info with reality
[PARISC] Remove unused macro fixup_branch in syscall.S
[PARISC] Add is_compat_task() helper
[PARISC] Update Thibaut Varene's CREDITS entry
[PARISC] Reduce data footprint in pdc_stable.c
[PARISC] pdc_stable version 0.30
[PARISC] Work around machines which do not support chassis warnings
[PARISC] PDC_CHASSIS is implemented on all machines
[PARISC] Remove unconditional #define PIC in syscall macros
[PARISC] Use MFIA in current_text_addr on pa2.0 processors
[PARISC] Remove dead function pc_in_user_space
[PARISC] Test ioc_needs_fdc variable instead of open coding
[PARISC] Fix gcc 4.1 warnings in sba_iommu.c
...
Diffstat (limited to 'arch/parisc/kernel/traps.c')
-rw-r--r-- | arch/parisc/kernel/traps.c | 84 |
1 files changed, 40 insertions, 44 deletions
diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c index ff200608c851..348344a84bf7 100644 --- a/arch/parisc/kernel/traps.c +++ b/arch/parisc/kernel/traps.c @@ -66,57 +66,42 @@ int printbinary(char *buf, unsigned long x, int nbits) #else #define RFMT "%08lx" #endif +#define FFMT "%016llx" /* fpregs are 64-bit always */ -void show_regs(struct pt_regs *regs) +#define PRINTREGS(lvl,r,f,fmt,x) \ + printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \ + lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \ + (r)[(x)+2], (r)[(x)+3]) + +static void print_gr(char *level, struct pt_regs *regs) { int i; - char buf[128], *p; - char *level; - unsigned long cr30; - unsigned long cr31; - /* carlos says that gcc understands better memory in a struct, - * and it makes our life easier with fpregs -- T-Bone */ - struct { u32 sw[2]; } s; - - level = user_mode(regs) ? KERN_DEBUG : KERN_CRIT; - - printk("%s\n", level); /* don't want to have that pretty register dump messed up */ + char buf[64]; + printk("%s\n", level); printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level); printbinary(buf, regs->gr[0], 32); printk("%sPSW: %s %s\n", level, buf, print_tainted()); - for (i = 0; i < 32; i += 4) { - int j; - p = buf; - p += sprintf(p, "%sr%02d-%02d ", level, i, i + 3); - for (j = 0; j < 4; j++) { - p += sprintf(p, " " RFMT, (i+j) == 0 ? 0 : regs->gr[i + j]); - } - printk("%s\n", buf); - } + for (i = 0; i < 32; i += 4) + PRINTREGS(level, regs->gr, "r", RFMT, i); +} - for (i = 0; i < 8; i += 4) { - int j; - p = buf; - p += sprintf(p, "%ssr%d-%d ", level, i, i + 3); - for (j = 0; j < 4; j++) { - p += sprintf(p, " " RFMT, regs->sr[i + j]); - } - printk("%s\n", buf); - } +static void print_fr(char *level, struct pt_regs *regs) +{ + int i; + char buf[64]; + struct { u32 sw[2]; } s; /* FR are 64bit everywhere. Need to use asm to get the content * of fpsr/fper1, and we assume that we won't have a FP Identify * in our way, otherwise we're screwed. * The fldd is used to restore the T-bit if there was one, as the * store clears it anyway. - * BTW, PA2.0 book says "thou shall not use fstw on FPSR/FPERs". */ - __asm__ ( - "fstd %%fr0,0(%1) \n\t" - "fldd 0(%1),%%fr0 \n\t" - : "=m" (s) : "r" (&s) : "%r0" - ); + * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */ + asm volatile ("fstd %%fr0,0(%1) \n\t" + "fldd 0(%1),%%fr0 \n\t" + : "=m" (s) : "r" (&s) : "r0"); printk("%s\n", level); printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level); @@ -125,14 +110,25 @@ void show_regs(struct pt_regs *regs) printk("%sFPER1: %08x\n", level, s.sw[1]); /* here we'll print fr0 again, tho it'll be meaningless */ - for (i = 0; i < 32; i += 4) { - int j; - p = buf; - p += sprintf(p, "%sfr%02d-%02d ", level, i, i + 3); - for (j = 0; j < 4; j++) - p += sprintf(p, " %016llx", (i+j) == 0 ? 0 : regs->fr[i+j]); - printk("%s\n", buf); - } + for (i = 0; i < 32; i += 4) + PRINTREGS(level, regs->fr, "fr", FFMT, i); +} + +void show_regs(struct pt_regs *regs) +{ + int i; + char *level; + unsigned long cr30, cr31; + + level = user_mode(regs) ? KERN_DEBUG : KERN_CRIT; + + print_gr(level, regs); + + for (i = 0; i < 8; i += 4) + PRINTREGS(level, regs->sr, "sr", RFMT, i); + + if (user_mode(regs)) + print_fr(level, regs); cr30 = mfctl(30); cr31 = mfctl(31); |