diff options
author | Matthew Wilcox <willy@parisc-linux.org> | 2005-10-22 04:56:14 +0200 |
---|---|---|
committer | Kyle McMartin <kyle@parisc-linux.org> | 2005-10-22 04:56:14 +0200 |
commit | e635c96ed6c972e1b3cb0c0fc3681c1204697287 (patch) | |
tree | 7bae8401ea7ed96881341b6c4793985d79cf6839 /arch/parisc/kernel | |
parent | [PARISC] Properly specify index field to I/D cache flush ops (diff) | |
download | linux-e635c96ed6c972e1b3cb0c0fc3681c1204697287.tar.xz linux-e635c96ed6c972e1b3cb0c0fc3681c1204697287.zip |
[PARISC] Explicitly specify sr4 when flushing kernel space
Specify sr4 when flushing kernel space (we could equally well use sr5-7,
but must not use sr0).
Signed-off-by: Matthew Wilcox <willy@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'arch/parisc/kernel')
-rw-r--r-- | arch/parisc/kernel/pacache.S | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S index 08cde5addfca..9534ee17b9be 100644 --- a/arch/parisc/kernel/pacache.S +++ b/arch/parisc/kernel/pacache.S @@ -949,23 +949,23 @@ flush_kernel_icache_page: sub %r25, %r23, %r25 -1: fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) - fic,m %r23(%r26) +1: fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) + fic,m %r23(%sr4, %r26) CMPB<< %r26, %r25, 1b - fic,m %r23(%r26) + fic,m %r23(%sr4, %r26) sync bv %r0(%r2) @@ -987,7 +987,7 @@ flush_kernel_icache_range_asm: ANDCM %r26, %r21, %r26 1: CMPB<<,n %r26, %r25, 1b - fic,m %r23(%r26) + fic,m %r23(%sr4, %r26) sync bv %r0(%r2) |