diff options
| author | Helge Deller <deller@gmx.de> | 2022-05-07 15:32:38 +0200 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2022-05-08 20:01:11 +0200 |
| commit | 7962c0896429af2a0e00ec6bc15d992536453b2d (patch) | |
| tree | 4a2dc6f8af83f7f374eb32b87411615698a73879 /arch/parisc/kernel | |
| parent | Revert "parisc: Mark cr16 CPU clocksource unstable on all SMP machines" (diff) | |
| download | linux-7962c0896429af2a0e00ec6bc15d992536453b2d.tar.xz linux-7962c0896429af2a0e00ec6bc15d992536453b2d.zip | |
Revert "parisc: Mark sched_clock unstable only if clocks are not syncronized"
This reverts commit d97180ad68bdb7ee10f327205a649bc2f558741d.
It triggers RCU stalls at boot with a 32-bit kernel.
Signed-off-by: Helge Deller <deller@gmx.de>
Noticed-by: John David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org # v5.15+
Diffstat (limited to 'arch/parisc/kernel')
| -rw-r--r-- | arch/parisc/kernel/setup.c | 2 | ||||
| -rw-r--r-- | arch/parisc/kernel/time.c | 7 |
2 files changed, 6 insertions, 3 deletions
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c index b91cb45ffd4e..f005ddedb50e 100644 --- a/arch/parisc/kernel/setup.c +++ b/arch/parisc/kernel/setup.c @@ -161,6 +161,8 @@ void __init setup_arch(char **cmdline_p) #ifdef CONFIG_PA11 dma_ops_init(); #endif + + clear_sched_clock_stable(); } /* diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c index 95ee9e1a364b..19c31a72fe76 100644 --- a/arch/parisc/kernel/time.c +++ b/arch/parisc/kernel/time.c @@ -267,9 +267,6 @@ static int __init init_cr16_clocksource(void) (cpu0_loc == per_cpu(cpu_data, cpu).cpu_loc)) continue; - /* mark sched_clock unstable */ - clear_sched_clock_stable(); - clocksource_cr16.name = "cr16_unstable"; clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE; clocksource_cr16.rating = 0; @@ -277,6 +274,10 @@ static int __init init_cr16_clocksource(void) } } + /* XXX: We may want to mark sched_clock stable here if cr16 clocks are + * in sync: + * (clocksource_cr16.flags == CLOCK_SOURCE_IS_CONTINUOUS) */ + /* register at clocksource framework */ clocksource_register_hz(&clocksource_cr16, 100 * PAGE0->mem_10msec); |