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| author | Christophe Leroy <christophe.leroy@c-s.fr> | 2019-02-21 20:08:51 +0100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2019-02-23 11:04:32 +0100 |
| commit | d5f17ee96447736a84bc44ffc4b0dddb1b519222 (patch) | |
| tree | 6cd30783636f3e54bdec42c13b3e95af096762c6 /arch/powerpc/Kconfig | |
| parent | powerpc/kconfig: make _etext and data areas alignment configurable on Book3s 32 (diff) | |
| download | linux-d5f17ee96447736a84bc44ffc4b0dddb1b519222.tar.xz linux-d5f17ee96447736a84bc44ffc4b0dddb1b519222.zip | |
powerpc/8xx: don't disable large TLBs with CONFIG_STRICT_KERNEL_RWX
This patch implements handling of STRICT_KERNEL_RWX with
large TLBs directly in the TLB miss handlers.
To do so, etext and sinittext are aligned on 512kB boundaries
and the miss handlers use 512kB pages instead of 8Mb pages for
addresses close to the boundaries.
It sets RO PP flags for addresses under sinittext.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/Kconfig')
| -rw-r--r-- | arch/powerpc/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 81df0dbc8a9a..43fa82e409bf 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -735,6 +735,7 @@ config ETEXT_SHIFT int "_etext shift" if ETEXT_SHIFT_BOOL range 17 28 if STRICT_KERNEL_RWX && PPC_BOOK3S_32 default 17 if STRICT_KERNEL_RWX && PPC_BOOK3S_32 + default 19 if STRICT_KERNEL_RWX && PPC_8xx default PPC_PAGE_SHIFT help On Book3S 32 (603+), IBATs are used to map kernel text. @@ -755,6 +756,7 @@ config DATA_SHIFT default 24 if STRICT_KERNEL_RWX && PPC64 range 17 28 if STRICT_KERNEL_RWX && PPC_BOOK3S_32 default 22 if STRICT_KERNEL_RWX && PPC_BOOK3S_32 + default 19 if STRICT_KERNEL_RWX && PPC_8xx default PPC_PAGE_SHIFT help On Book3S 32 (603+), DBATs are used to map kernel text and rodata RO. |