[POWERPC] 83xx: Clean up / convert mpc83xx board DTS files to v1 format.

This patch converts the remaining 83xx boards to the dts-v1 format.
This includes the mpc8313_rdb, mpc832x_mds, mpc8323_rdb, mpc8349emitx,
mpc8349emitxgp and the mpc836x_mds.

The mpc8315_rdb mpc834x_mds, mpc837[789]_*, and sbc8349 were already
dts-v1 and only undergo minor changes for the sake of formatting
consistency across the whole group of boards; i.e.  the idea being
that you can do a "diff -u board_A.dts board_B.dts" and see something
meaningful.

The general rule I've applied is that entries for values normally
parsed by humans are left in decimal (i.e. IRQ, cache size, clock
rates, basic counts and indexes) and all other data (i.e. reg and
ranges, IRQ flags etc.) remain in hex.

I've used dtc to confirm that the output prior to this changeset
matches the output after this changeset is applied for all boards.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 50 insertions, 50 deletions

diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index e157f2342ea0..b582032ba3d6 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -30,7 +30,7 @@
 
 		PowerPC,8315@0 {
 			device_type = "cpu";
-			reg = <0>;
+			reg = <0x0>;
 			d-cache-line-size = <32>;
 			i-cache-line-size = <32>;
 			d-cache-size = <16384>;
@@ -51,22 +51,22 @@
 		#size-cells = <1>;
 		compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
 		reg = <0xe0005000 0x1000>;
-		interrupts = <77 8>;
+		interrupts = <77 0x8>;
 		interrupt-parent = <&ipic>;
 
 		// CS0 and CS1 are swapped when
 		// booting from nand, but the
 		// addresses are the same.
-		ranges = <0 0 0xfe000000 0x00800000
-		          1 0 0xe0600000 0x00002000
-		          2 0 0xf0000000 0x00020000
-		          3 0 0xfa000000 0x00008000>;
+		ranges = <0x0 0x0 0xfe000000 0x00800000
+		          0x1 0x0 0xe0600000 0x00002000
+		          0x2 0x0 0xf0000000 0x00020000
+		          0x3 0x0 0xfa000000 0x00008000>;
 
 		flash@0,0 {
 			#address-cells = <1>;
 			#size-cells = <1>;
 			compatible = "cfi-flash";
-			reg = <0 0 0x800000>;
+			reg = <0x0 0x0 0x800000>;
 			bank-width = <2>;
 			device-width = <1>;
 		};
@@ -76,7 +76,7 @@
 			#size-cells = <1>;
 			compatible = "fsl,mpc8315-fcm-nand",
 			             "fsl,elbc-fcm-nand";
-			reg = <1 0 0x2000>;
+			reg = <0x1 0x0 0x2000>;
 
 			u-boot@0 {
 				reg = <0x0 0x100000>;
@@ -113,8 +113,8 @@
 			cell-index = <0>;
 			compatible = "fsl-i2c";
 			reg = <0x3000 0x100>;
-			interrupts = <14 8>;
-			interrupt-parent = < &ipic >;
+			interrupts = <14 0x8>;
+			interrupt-parent = <&ipic>;
 			dfsrr;
 			rtc@68 {
 				device_type = "rtc";
@@ -127,8 +127,8 @@
 			cell-index = <0>;
 			compatible = "fsl,spi";
 			reg = <0x7000 0x1000>;
-			interrupts = <16 8>;
-			interrupt-parent = < &ipic >;
+			interrupts = <16 0x8>;
+			interrupt-parent = <&ipic>;
 			mode = "cpu";
 		};
 
@@ -137,8 +137,8 @@
 			reg = <0x23000 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			interrupt-parent = < &ipic >;
-			interrupts = <38 8>;
+			interrupt-parent = <&ipic>;
+			interrupts = <38 0x8>;
 			phy_type = "utmi";
 		};
 
@@ -148,15 +148,15 @@
 			compatible = "fsl,gianfar-mdio";
 			reg = <0x24520 0x20>;
 			phy0: ethernet-phy@0 {
-				interrupt-parent = < &ipic >;
-				interrupts = <20 8>;
-				reg = <0>;
+				interrupt-parent = <&ipic>;
+				interrupts = <20 0x8>;
+				reg = <0x0>;
 				device_type = "ethernet-phy";
 			};
 			phy1: ethernet-phy@1 {
-				interrupt-parent = < &ipic >;
-				interrupts = <19 8>;
-				reg = <1>;
+				interrupt-parent = <&ipic>;
+				interrupts = <19 0x8>;
+				reg = <0x1>;
 				device_type = "ethernet-phy";
 			};
 		};
@@ -168,8 +168,8 @@
 			compatible = "gianfar";
 			reg = <0x24000 0x1000>;
 			local-mac-address = [ 00 00 00 00 00 00 ];
-			interrupts = <32 8 33 8 34 8>;
-			interrupt-parent = < &ipic >;
+			interrupts = <32 0x8 33 0x8 34 0x8>;
+			interrupt-parent = <&ipic>;
 			phy-handle = < &phy0 >;
 		};
 
@@ -180,8 +180,8 @@
 			compatible = "gianfar";
 			reg = <0x25000 0x1000>;
 			local-mac-address = [ 00 00 00 00 00 00 ];
-			interrupts = <35 8 36 8 37 8>;
-			interrupt-parent = < &ipic >;
+			interrupts = <35 0x8 36 0x8 37 0x8>;
+			interrupt-parent = <&ipic>;
 			phy-handle = < &phy1 >;
 		};
 
@@ -191,8 +191,8 @@
 			compatible = "ns16550";
 			reg = <0x4500 0x100>;
 			clock-frequency = <0>;
-			interrupts = <9 8>;
-			interrupt-parent = < &ipic >;
+			interrupts = <9 0x8>;
+			interrupt-parent = <&ipic>;
 		};
 
 		serial1: serial@4600 {
@@ -201,8 +201,8 @@
 			compatible = "ns16550";
 			reg = <0x4600 0x100>;
 			clock-frequency = <0>;
-			interrupts = <10 8>;
-			interrupt-parent = < &ipic >;
+			interrupts = <10 0x8>;
+			interrupt-parent = <&ipic>;
 		};
 
 		crypto@30000 {
@@ -210,8 +210,8 @@
 			device_type = "crypto";
 			compatible = "talitos";
 			reg = <0x30000 0x10000>;
-			interrupts = <11 8>;
-			interrupt-parent = < &ipic >;
+			interrupts = <11 0x8>;
+			interrupt-parent = <&ipic>;
 			/* Rev. 3.0 geometry */
 			num-channels = <4>;
 			channel-fifo-len = <24>;
@@ -223,16 +223,16 @@
 			compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
 			reg = <0x18000 0x1000>;
 			cell-index = <1>;
-			interrupts = <44 8>;
-			interrupt-parent = < &ipic >;
+			interrupts = <44 0x8>;
+			interrupt-parent = <&ipic>;
 		};
 
 		sata@19000 {
 			compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
 			reg = <0x19000 0x1000>;
 			cell-index = <2>;
-			interrupts = <45 8>;
-			interrupt-parent = < &ipic >;
+			interrupts = <45 0x8>;
+			interrupt-parent = <&ipic>;
 		};
 
 		/* IPIC
@@ -251,28 +251,28 @@
 	};
 
 	pci0: pci@e0008500 {
-		interrupt-map-mask = <0xf800 0 0 7>;
+		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 		interrupt-map = <
 				/* IDSEL 0x0E -mini PCI */
-				 0x7000 0 0 1 &ipic 18 8
-				 0x7000 0 0 2 &ipic 18 8
-				 0x7000 0 0 3 &ipic 18 8
-				 0x7000 0 0 4 &ipic 18 8
+				 0x7000 0x0 0x0 0x1 &ipic 18 0x8
+				 0x7000 0x0 0x0 0x2 &ipic 18 0x8
+				 0x7000 0x0 0x0 0x3 &ipic 18 0x8
+				 0x7000 0x0 0x0 0x4 &ipic 18 0x8
 
 				/* IDSEL 0x0F -mini PCI */
-				 0x7800 0 0 1 &ipic 17 8
-				 0x7800 0 0 2 &ipic 17 8
-				 0x7800 0 0 3 &ipic 17 8
-				 0x7800 0 0 4 &ipic 17 8
+				 0x7800 0x0 0x0 0x1 &ipic 17 0x8
+				 0x7800 0x0 0x0 0x2 &ipic 17 0x8
+				 0x7800 0x0 0x0 0x3 &ipic 17 0x8
+				 0x7800 0x0 0x0 0x4 &ipic 17 0x8
 
 				/* IDSEL 0x10 - PCI slot */
-				 0x8000 0 0 1 &ipic 48 8
-				 0x8000 0 0 2 &ipic 17 8
-				 0x8000 0 0 3 &ipic 48 8
-				 0x8000 0 0 4 &ipic 17 8>;
-		interrupt-parent = < &ipic >;
-		interrupts = <66 8>;
-		bus-range = <0 0>;
+				 0x8000 0x0 0x0 0x1 &ipic 48 0x8
+				 0x8000 0x0 0x0 0x2 &ipic 17 0x8
+				 0x8000 0x0 0x0 0x3 &ipic 48 0x8
+				 0x8000 0x0 0x0 0x4 &ipic 17 0x8>;
+		interrupt-parent = <&ipic>;
+		interrupts = <66 0x8>;
+		bus-range = <0x0 0x0>;
 		ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
 			  0x42000000 0 0x80000000 0x80000000 0 0x10000000
 			  0x01000000 0 0x00000000 0xe0300000 0 0x00100000>;