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| author | H. Peter Anvin <hpa@linux.intel.com> | 2012-01-19 21:56:50 +0100 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2012-01-19 21:56:50 +0100 |
| commit | 282f445a779ed76fca9884fe377bf56a3088b208 (patch) | |
| tree | d9abcf526baee0100672851e0a8894c19e762a39 /arch/powerpc/boot/dts/p3060qds.dts | |
| parent | x86, tsc: Fix SMI induced variation in quick_pit_calibrate() (diff) | |
| parent | uml: fix compile for x86-64 (diff) | |
| download | linux-282f445a779ed76fca9884fe377bf56a3088b208.tar.xz linux-282f445a779ed76fca9884fe377bf56a3088b208.zip | |
Merge remote-tracking branch 'linus/master' into x86/urgent
Diffstat (limited to 'arch/powerpc/boot/dts/p3060qds.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/p3060qds.dts | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/powerpc/boot/dts/p3060qds.dts b/arch/powerpc/boot/dts/p3060qds.dts index 08b9193213e7..529042e4b9a2 100644 --- a/arch/powerpc/boot/dts/p3060qds.dts +++ b/arch/powerpc/boot/dts/p3060qds.dts @@ -32,7 +32,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/include/ "p3060si.dtsi" +/include/ "fsl/p3060si-pre.dtsi" / { model = "fsl,P3060QDS"; @@ -50,6 +50,8 @@ }; soc: soc@ffe000000 { + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; spi@110000 { flash@0 { #address-cells = <1>; @@ -138,7 +140,7 @@ }; }; - rapidio@ffe0c0000 { + rio: rapidio@ffe0c0000 { reg = <0xf 0xfe0c0000 0 0x11000>; port1 { @@ -149,7 +151,7 @@ }; }; - localbus@ffe124000 { + lbc: localbus@ffe124000 { reg = <0xf 0xfe124000 0 0x1000>; ranges = <0 0 0xf 0xe8000000 0x08000000 2 0 0xf 0xffa00000 0x00040000 @@ -210,6 +212,7 @@ reg = <0xf 0xfe200000 0 0x1000>; ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; + fsl,msi = <&msi0>; pcie@0 { ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 @@ -225,6 +228,7 @@ reg = <0xf 0xfe201000 0 0x1000>; ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; + fsl,msi = <&msi1>; pcie@0 { ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 @@ -236,3 +240,5 @@ }; }; }; + +/include/ "fsl/p3060si-post.dtsi" |