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authorValentine Barshak <vbarshak@ru.mvista.com>2007-09-21 16:50:09 +0200
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-10-03 14:20:18 +0200
commit340ffd267c85fc28da7cfd681b177c816af800cf (patch)
treeb9a757d6d0566420fe103c02d60f2b520e5c3880 /arch/powerpc/boot/ops.h
parent[POWERPC] 4xx: Move 440EP(x) FPU setup from head_44x to cpu_setup_4xx (diff)
downloadlinux-340ffd267c85fc28da7cfd681b177c816af800cf.tar.xz
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[POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround
Add a workaround for PowerPC 440EPx/GRx incorrect write to DDR SDRAM errata. Data can be written to wrong address in SDRAM when write pipelining enabled on plb0. We disable it in the cpu_setup for these processors at early init. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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