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authorChristophe Leroy <christophe.leroy@c-s.fr>2016-02-09 17:08:23 +0100
committerScott Wood <oss@buserror.net>2016-03-12 00:20:11 +0100
commitd6bfa02fccf58b957f457c1bd0bb71f6ab169a0b (patch)
treef59f48c349da5be1d4710a803207ee278a5e4d7a /arch/powerpc/include/asm/cache.h
parentpowerpc/8xx: rewrite flush_instruction_cache() in C (diff)
downloadlinux-d6bfa02fccf58b957f457c1bd0bb71f6ab169a0b.tar.xz
linux-d6bfa02fccf58b957f457c1bd0bb71f6ab169a0b.zip
powerpc: add inline functions for cache related instructions
This patch adds inline functions to use dcbz, dcbi, dcbf, dcbst from C functions Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <oss@buserror.net>
Diffstat (limited to 'arch/powerpc/include/asm/cache.h')
-rw-r--r--arch/powerpc/include/asm/cache.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 5f8229e24fe6..ffbafbf76b19 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -69,6 +69,25 @@ extern void _set_L3CR(unsigned long);
#define _set_L3CR(val) do { } while(0)
#endif
+static inline void dcbz(void *addr)
+{
+ __asm__ __volatile__ ("dcbz 0, %0" : : "r"(addr) : "memory");
+}
+
+static inline void dcbi(void *addr)
+{
+ __asm__ __volatile__ ("dcbi 0, %0" : : "r"(addr) : "memory");
+}
+
+static inline void dcbf(void *addr)
+{
+ __asm__ __volatile__ ("dcbf 0, %0" : : "r"(addr) : "memory");
+}
+
+static inline void dcbst(void *addr)
+{
+ __asm__ __volatile__ ("dcbst 0, %0" : : "r"(addr) : "memory");
+}
#endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_CACHE_H */