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authorchenhui zhao <chenhui.zhao@freescale.com>2015-11-20 10:13:58 +0100
committerScott Wood <oss@buserror.net>2016-03-05 06:44:51 +0100
commite7affb1dba0e9068aeb3978e858f39753e0dc20a (patch)
treeacc3b13685888fd5ad9ba6a67b0b6235447eba7f /arch/powerpc/include/asm/cacheflush.h
parentpowerpc/mm: any thread in one core can be the first to setup TLB1 (diff)
downloadlinux-e7affb1dba0e9068aeb3978e858f39753e0dc20a.tar.xz
linux-e7affb1dba0e9068aeb3978e858f39753e0dc20a.zip
powerpc/cache: add cache flush operation for various e500
Various e500 core have different cache architecture, so they need different cache flush operations. Therefore, add a callback function cpu_flush_caches to the struct cpu_spec. The cache flush operation for the specific kind of e500 is selected at init time. The callback function will flush all caches inside the current cpu. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@feescale.com> Signed-off-by: Scott Wood <oss@buserror.net>
Diffstat (limited to 'arch/powerpc/include/asm/cacheflush.h')
-rw-r--r--arch/powerpc/include/asm/cacheflush.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index 6229e6b6037b..47add2e2364a 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -30,8 +30,6 @@ extern void flush_dcache_page(struct page *page);
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
-extern void __flush_disable_L1(void);
-
extern void flush_icache_range(unsigned long, unsigned long);
extern void flush_icache_user_range(struct vm_area_struct *vma,
struct page *page, unsigned long addr,