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author | Scott Wood <scottwood@freescale.com> | 2014-03-10 23:29:38 +0100 |
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committer | Scott Wood <scottwood@freescale.com> | 2014-03-20 01:57:15 +0100 |
commit | a3dc620743f44cd509a1ab7b01c33d26fb501c8c (patch) | |
tree | bee3b37742185aa7c43f50fefa7c59928e937a03 /arch/powerpc/include/asm/exception-64e.h | |
parent | powerpc/booke64: Use SPRG7 for VDSO (diff) | |
download | linux-a3dc620743f44cd509a1ab7b01c33d26fb501c8c.tar.xz linux-a3dc620743f44cd509a1ab7b01c33d26fb501c8c.zip |
powerpc/booke64: Use SPRG_TLB_EXFRAME on bolted handlers
While bolted handlers (including e6500) do not need to deal with a TLB
miss recursively causing another TLB miss, nested TLB misses can still
happen with crit/mc/debug exceptions -- so we still need to honor
SPRG_TLB_EXFRAME.
We don't need to spend time modifying it in the TLB miss fastpath,
though -- the special level exception will handle that.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Mihai Caraman <mihai.caraman@freescale.com>
Cc: kvm-ppc@vger.kernel.org
Diffstat (limited to 'arch/powerpc/include/asm/exception-64e.h')
-rw-r--r-- | arch/powerpc/include/asm/exception-64e.h | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/powerpc/include/asm/exception-64e.h b/arch/powerpc/include/asm/exception-64e.h index e73452f09019..a563d9afd179 100644 --- a/arch/powerpc/include/asm/exception-64e.h +++ b/arch/powerpc/include/asm/exception-64e.h @@ -172,16 +172,6 @@ exc_##label##_book3e: ld r9,EX_TLB_R9(r12); \ ld r8,EX_TLB_R8(r12); \ mtlr r16; -#define TLB_MISS_PROLOG_STATS_BOLTED \ - mflr r10; \ - std r8,PACA_EXTLB+EX_TLB_R8(r13); \ - std r9,PACA_EXTLB+EX_TLB_R9(r13); \ - std r10,PACA_EXTLB+EX_TLB_LR(r13); -#define TLB_MISS_RESTORE_STATS_BOLTED \ - ld r16,PACA_EXTLB+EX_TLB_LR(r13); \ - ld r9,PACA_EXTLB+EX_TLB_R9(r13); \ - ld r8,PACA_EXTLB+EX_TLB_R8(r13); \ - mtlr r16; #define TLB_MISS_STATS_D(name) \ addi r9,r13,MMSTAT_DSTATS+name; \ bl .tlb_stat_inc; |